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34fed775b6
This patch allows a board to include another RW image in ec.bin. The size of each copy is a quarter of the flash size on Fizz. BUG=b:38462249 BRANCH=none CQ-DEPEND=CL:568297 TEST=Run sysjump RW/A/B. Verify there is no size change by running make savesizes/newsizes. Run objdump -h build/fizz/ec.obj: Idx Name Size VMA LMA File off Algn 0 .image.RO 0001700c 10088000 10088000 00008000 2**0 CONTENTS, ALLOC, LOAD, READONLY, CODE 1 .image.RO.key 00000340 1009f00c 100a7c40 0001f00c 2**0 CONTENTS, ALLOC, LOAD, READONLY, DATA 2 .image.RW 00016ddc 1009f34c 100c8000 0001f34c 2**0 CONTENTS, ALLOC, LOAD, READONLY, CODE 3 .image.RW.sign 000001b8 100b6128 100e7c00 00036128 2**0 CONTENTS, ALLOC, LOAD, READONLY, DATA 4 .image.RW_B 00016ddc 100b62e0 100e8000 000362e0 2**0 CONTENTS, ALLOC, LOAD, READONLY, CODE 5 .image.RW_B.sign 000001b8 100cd0bc 10107c00 0004d0bc 2**0 CONTENTS, ALLOC, LOAD, READONLY, DATA 6 .padding 00000001 100cd274 10107fff 0004d274 2**0 CONTENTS, ALLOC, LOAD, DATA 7 .ARM.attributes 00000014 00000000 00000000 0004d275 2**0 CONTENTS, READONLY Change-Id: Iaa687c1d7d704fec4cccfa127376c8db102267fa Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/557305 Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
91 lines
2.9 KiB
ArmAsm
91 lines
2.9 KiB
ArmAsm
/* Copyright (c) 2012 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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#include "config.h"
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#include "rwsig.h"
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#ifdef NPCX_RO_HEADER
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/* Replace *_MEM_OFF with *_STORAGE_OFF to indicate flat file contains header
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* or some struture which doesn't belong to FW */
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#define IMAGE_RO_AT (CONFIG_PROGRAM_MEMORY_BASE + \
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CONFIG_EC_PROTECTED_STORAGE_OFF)
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/* npcx uses *STORAGE_OFF to plan the layout of flash image */
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#define IMAGE_RW_AT (CONFIG_PROGRAM_MEMORY_BASE + \
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CONFIG_EC_WRITABLE_STORAGE_OFF + \
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CONFIG_RW_STORAGE_OFF)
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#define IMAGE_RW_B_AT (CONFIG_PROGRAM_MEMORY_BASE + \
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CONFIG_EC_WRITABLE_STORAGE_OFF + \
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CONFIG_RW_B_STORAGE_OFF)
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#elif (CONFIG_RO_MEM_OFF == CONFIG_RW_MEM_OFF)
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#define IMAGE_RO_AT (CONFIG_PROGRAM_MEMORY_BASE + CONFIG_RO_MEM_OFF)
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/* This is applicable to ECs in which RO and RW execution is
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mapped to the same location but we still have to generate an ec.bin with RO
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and RW images at different Flash offset */
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#define IMAGE_RW_AT (CONFIG_PROGRAM_MEMORY_BASE + \
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CONFIG_RO_MEM_OFF + CONFIG_RO_SIZE)
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#define IMAGE_RW_B_AT (CONFIG_PROGRAM_MEMORY_BASE + \
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CONFIG_RO_MEM_OFF + CONFIG_RO_SIZE + CONFIG_RW_SIZE)
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#else
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#define IMAGE_RO_AT (CONFIG_PROGRAM_MEMORY_BASE + CONFIG_RO_MEM_OFF)
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#define IMAGE_RW_AT (CONFIG_PROGRAM_MEMORY_BASE + CONFIG_RW_MEM_OFF)
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#define IMAGE_RW_B_AT (CONFIG_PROGRAM_MEMORY_BASE + CONFIG_RW_B_MEM_OFF)
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#endif
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OUTPUT_FORMAT(BFD_FORMAT, BFD_FORMAT, BFD_FORMAT)
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OUTPUT_ARCH(BFD_ARCH)
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MEMORY
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{
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FLASH (rx) : ORIGIN = CONFIG_PROGRAM_MEMORY_BASE, LENGTH = CONFIG_FLASH_SIZE
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}
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SECTIONS
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{
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.image.RO : AT(IMAGE_RO_AT) {
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*(.image.RO)
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} > FLASH =0xff
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#ifdef CONFIG_RWSIG_TYPE_RWSIG
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.image.RO.key : AT(CONFIG_RO_PUBKEY_ADDR) {
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*(.image.RO.key)
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} > FLASH =0xff
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#endif
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#ifdef CONFIG_ROLLBACK
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.image.ROLLBACK : AT(CONFIG_PROGRAM_MEMORY_BASE + CONFIG_ROLLBACK_OFF) {
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*(.image.ROLLBACK)
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} > FLASH =0xff
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#endif
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#ifdef CONFIG_SHAREDLIB
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.image.libsharedobjs : AT(CONFIG_PROGRAM_MEMORY_BASE + \
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CONFIG_SHAREDLIB_MEM_OFF) {
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*(.image.libsharedobjs)
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} > FLASH =0xff
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#endif
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.image.RW : AT(IMAGE_RW_AT) {
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*(.image.RW)
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} > FLASH =0xff
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#ifdef CONFIG_RWSIG_TYPE_RWSIG
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.image.RW.sign : AT(CONFIG_RW_SIG_ADDR) {
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*(.image.RW.sign)
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} > FLASH =0xff
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#endif
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#ifdef CONFIG_RW_B_MEM_OFF
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.image.RW_B : AT(IMAGE_RW_B_AT) {
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*(.image.RW_B)
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} > FLASH =0xff
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#ifdef CONFIG_RWSIG_TYPE_RWSIG
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.image.RW_B.sign : AT(CONFIG_RW_B_SIG_ADDR) {
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*(.image.RW_B.sign)
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} > FLASH =0xff
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#endif
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#endif
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.padding : AT(CONFIG_PROGRAM_MEMORY_BASE + CONFIG_FLASH_SIZE - 1) {
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BYTE(0xff);
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} > FLASH =0xff
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}
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