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Add intial minute-IA (x86) core to to enable the FW to boot on Intel Integrated Sensor Hub (ISH). BUG=chrome-os-partner:51851 BRANCH=None TEST=`make buildall -j` Change-Id: I4dcf841766f216cd00fb1d4214fae19ba5de5603 Signed-off-by: Jaiber John <jaiber.j.john@intel.com> Signed-off-by: Alex Brill <alexander.brill@intel.com> Reviewed-on: https://chromium-review.googlesource.com/336443 Commit-Ready: Raj Mojumder <raj.mojumder@intel.com> Tested-by: Raj Mojumder <raj.mojumder@intel.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
111 lines
2.3 KiB
ArmAsm
111 lines
2.3 KiB
ArmAsm
/* Copyright (c) 2016 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*
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* x86 task swtching and interrupt handling
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*/
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#include "config.h"
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#include "registers.h"
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#include "task_defs.h"
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.text
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.extern current_task
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.extern next_task
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.global __task_start
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.global __switchto
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.global default_int_handler
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# Start the task scheduling. Start current_task (hook_task)
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# This function is not an ISR but imitates the sequence.
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.align 4
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.func __task_start
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__task_start:
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movl current_task, %eax
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movl (%eax), %esp
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popa
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iret
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.endfunc
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# Default interrupt handler - to handle exceptions
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# and prints error
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.align 4
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.func default_int_handler
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default_int_handler:
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pusha
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add $1, __in_isr
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call unhandled_vector # Handle system interrupts and
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# unregistered user interrupts
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cmpl $LAPIC_SPURIOUS_INT_VECTOR, %eax
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je 1f # No EOI for LAPIC_SPURIOUS_INT_VECTOR
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movl %eax, IOAPIC_EOI_REG # Indicate completion of servicing the
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# interrupt to IOAPIC first
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sub $1, __in_isr
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movl $0x00, LAPIC_EOI_REG # Indicate completion of servicing the
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# interrupt to LAPIC next
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1:
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popa
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iret
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.endfunc
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# Switches from one task to another if ready.
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# __schedule triggeres software interrupt ISH_TS_VECTOR, which is handled by
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# __switchto
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.align 4
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.func __switchto
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__switchto:
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# Save current task
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pusha
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addl $1, __in_isr
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# __schedule() copies 'resched' to %ecx and 'desched' to %edx before
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# triggering ISH_TS_VECTOR
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#
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# Push %ecx and %edx into stack to pass them as function parameters
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# to switch_handler(desched, resched)
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push %ecx
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push %edx
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call switch_handler
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addl $0x8, %esp # Clean up stack
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test %eax, %eax # Check if task switch required
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jz 1f
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movl current_task, %eax
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#ifdef CONFIG_FPU
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fnsave 20(%eax) # Save current FPU context at current->fp_ctx
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#endif
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# Save SP of current task and switch to new task
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movl %esp, (%eax)
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movl next_task, %eax
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movl %eax, current_task
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movl (%eax), %esp
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#ifdef CONFIG_FPU
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frstor 20(%eax) # Restore next FPU context
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#endif
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1:
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subl $1, __in_isr
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# Indicate completion of servicing the interrupt to LAPIC.
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# No IOAPIC EOI needed as this is SW triggered.
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movl $0x00, LAPIC_EOI_REG
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# Restore general purpose registers.
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popa
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iret
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.endfunc
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