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https://github.com/Telecominfraproject/OpenCellular.git
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ee3fb6c6aa
the ps8xxx family of TCPCs (ps8751, ps8805) have historically used the generic tcpci_tcpm_drv functions, but we need to override some of these entry points because the parade parts need to be woken up before accessing registers. in most cases, this doesn't matter because we access the chip in quick succession where we can "safely" assume the chip is awake -- and the code is structured to implicitly keep the chip awake. the new case we need to address here is where we need to suspend the pd_task and TCPC at an arbitrary point in time. the driver's .release method is called to shut down the chip, and that involves first waking up the chip to be able to access its regs to mask off interrupts, etc. BUG=b:35586896 BRANCH=none TEST=tested from depthcharge - we no longer get errors in the EC console logs about TCPC "release" failed. Change-Id: Ic2a90b71050b3f68c697b1cef48d736ed88b3f41 Signed-off-by: Caveh Jalali <caveh@google.com> Reviewed-on: https://chromium-review.googlesource.com/616460 Reviewed-by: Shawn N <shawnn@chromium.org>
153 lines
5.8 KiB
C
153 lines
5.8 KiB
C
/* Copyright 2015 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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/* USB Power delivery port management */
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#ifndef __CROS_EC_USB_PD_TCPM_TCPCI_H
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#define __CROS_EC_USB_PD_TCPM_TCPCI_H
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#include "tcpm.h"
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#include "usb_mux.h"
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#define TCPC_REG_VENDOR_ID 0x0
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#define TCPC_REG_PRODUCT_ID 0x2
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#define TCPC_REG_BCD_DEV 0x4
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#define TCPC_REG_TC_REV 0x6
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#define TCPC_REG_PD_REV 0x8
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#define TCPC_REG_PD_INT_REV 0xa
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#define TCPC_REG_ALERT 0x10
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#define TCPC_REG_ALERT_MASK_ALL 0xfff
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#define TCPC_REG_ALERT_VBUS_DISCNCT (1<<11)
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#define TCPC_REG_ALERT_RX_BUF_OVF (1<<10)
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#define TCPC_REG_ALERT_FAULT (1<<9)
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#define TCPC_REG_ALERT_V_ALARM_LO (1<<8)
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#define TCPC_REG_ALERT_V_ALARM_HI (1<<7)
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#define TCPC_REG_ALERT_TX_SUCCESS (1<<6)
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#define TCPC_REG_ALERT_TX_DISCARDED (1<<5)
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#define TCPC_REG_ALERT_TX_FAILED (1<<4)
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#define TCPC_REG_ALERT_RX_HARD_RST (1<<3)
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#define TCPC_REG_ALERT_RX_STATUS (1<<2)
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#define TCPC_REG_ALERT_POWER_STATUS (1<<1)
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#define TCPC_REG_ALERT_CC_STATUS (1<<0)
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#define TCPC_REG_ALERT_TX_COMPLETE (TCPC_REG_ALERT_TX_SUCCESS | \
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TCPC_REG_ALERT_TX_DISCARDED | \
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TCPC_REG_ALERT_TX_FAILED)
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#define TCPC_REG_ALERT_MASK 0x12
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#define TCPC_REG_POWER_STATUS_MASK 0x14
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#define TCPC_REG_FAULT_STATUS_MASK 0x15
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#define TCPC_REG_CONFIG_STD_OUTPUT 0x18
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#define TCPC_REG_CONFIG_STD_OUTPUT_MUX_MASK (3 << 2)
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#define TCPC_REG_CONFIG_STD_OUTPUT_MUX_NONE (0 << 2)
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#define TCPC_REG_CONFIG_STD_OUTPUT_MUX_USB (1 << 2)
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#define TCPC_REG_CONFIG_STD_OUTPUT_MUX_DP (2 << 2)
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#define TCPC_REG_CONFIG_STD_OUTPUT_CONNECTOR_FLIPPED (1 << 0)
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#define TCPC_REG_TCPC_CTRL 0x19
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#define TCPC_REG_TCPC_CTRL_SET(polarity) (polarity)
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#define TCPC_REG_TCPC_CTRL_POLARITY(reg) ((reg) & 0x1)
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#define TCPC_REG_ROLE_CTRL 0x1a
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#define TCPC_REG_ROLE_CTRL_SET(drp, rp, cc1, cc2) \
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((drp) << 6 | (rp) << 4 | (cc2) << 2 | (cc1))
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#define TCPC_REG_ROLE_CTRL_RP_MASK 0x30
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#define TCPC_REG_ROLE_CTRL_RP(reg) (((reg) & TCPC_REG_ROLE_CTRL_RP_MASK) >> 4)
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#define TCPC_REG_ROLE_CTRL_CC2(reg) (((reg) & 0xc) >> 2)
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#define TCPC_REG_ROLE_CTRL_CC1(reg) ((reg) & 0x3)
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#define TCPC_REG_FAULT_CTRL 0x1b
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#define TCPC_REG_POWER_CTRL 0x1c
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#define TCPC_REG_POWER_CTRL_FORCE_DISCHARGE (1 << 2)
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#define TCPC_REG_POWER_CTRL_SET(vconn) (vconn)
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#define TCPC_REG_POWER_CTRL_VCONN(reg) ((reg) & 0x1)
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#define TCPC_REG_CC_STATUS 0x1d
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#define TCPC_REG_CC_STATUS_LOOK4CONNECTION(reg) ((reg & 0x20) >> 5)
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#define TCPC_REG_CC_STATUS_SET(term, cc1, cc2) \
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((term) << 4 | ((cc2) & 0x3) << 2 | ((cc1) & 0x3))
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#define TCPC_REG_CC_STATUS_TERM(reg) (((reg) & 0x10) >> 4)
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#define TCPC_REG_CC_STATUS_CC2(reg) (((reg) & 0xc) >> 2)
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#define TCPC_REG_CC_STATUS_CC1(reg) ((reg) & 0x3)
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#define TCPC_REG_POWER_STATUS 0x1e
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#define TCPC_REG_POWER_STATUS_MASK_ALL 0xff
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#define TCPC_REG_POWER_STATUS_VBUS_PRES (1<<2)
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#define TCPC_REG_POWER_STATUS_VBUS_DET (1<<3)
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#define TCPC_REG_POWER_STATUS_UNINIT (1<<6)
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#define TCPC_REG_FAULT_STATUS 0x1f
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#define TCPC_REG_COMMAND 0x23
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#define TCPC_REG_COMMAND_LOOK4CONNECTION 0x99
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#define TCPC_REG_COMMAND_I2CIDLE 0xFF
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#define TCPC_REG_DEV_CAP_1 0x24
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#define TCPC_REG_DEV_CAP_2 0x26
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#define TCPC_REG_STD_INPUT_CAP 0x28
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#define TCPC_REG_STD_OUTPUT_CAP 0x29
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#define TCPC_REG_MSG_HDR_INFO 0x2e
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#define TCPC_REG_MSG_HDR_INFO_SET(drole, prole) \
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((drole) << 3 | (PD_REV20 << 1) | (prole))
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#define TCPC_REG_MSG_HDR_INFO_DROLE(reg) (((reg) & 0x8) >> 3)
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#define TCPC_REG_MSG_HDR_INFO_PROLE(reg) ((reg) & 0x1)
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#define TCPC_REG_RX_DETECT 0x2f
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#define TCPC_REG_RX_DETECT_SOP_HRST_MASK 0x21
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#define TCPC_REG_RX_BYTE_CNT 0x30
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#define TCPC_REG_RX_BUF_FRAME_TYPE 0x31
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#define TCPC_REG_RX_HDR 0x32
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#define TCPC_REG_RX_DATA 0x34 /* through 0x4f */
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#define TCPC_REG_TRANSMIT 0x50
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#define TCPC_REG_TRANSMIT_SET(type) \
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(PD_RETRY_COUNT << 4 | (type))
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#define TCPC_REG_TRANSMIT_RETRY(reg) (((reg) & 0x30) >> 4)
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#define TCPC_REG_TRANSMIT_TYPE(reg) ((reg) & 0x7)
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#define TCPC_REG_TX_BYTE_CNT 0x51
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#define TCPC_REG_TX_HDR 0x52
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#define TCPC_REG_TX_DATA 0x54 /* through 0x6f */
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#define TCPC_REG_VBUS_VOLTAGE 0x70
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#define TCPC_REG_VBUS_SINK_DISCONNECT_THRESH 0x72
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#define TCPC_REG_VBUS_STOP_DISCHARGE_THRESH 0x74
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#define TCPC_REG_VBUS_VOLTAGE_ALARM_HI_CFG 0x76
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#define TCPC_REG_VBUS_VOLTAGE_ALARM_LO_CFG 0x78
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extern const struct tcpm_drv tcpci_tcpm_drv;
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extern const struct usb_mux_driver tcpci_tcpm_usb_mux_driver;
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void tcpci_tcpc_alert(int port);
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int tcpci_tcpm_init(int port);
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int tcpci_tcpm_get_cc(int port, int *cc1, int *cc2);
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int tcpci_tcpm_get_vbus_level(int port);
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int tcpci_tcpm_select_rp_value(int port, int rp);
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int tcpci_tcpm_set_cc(int port, int pull);
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int tcpci_tcpm_set_polarity(int port, int polarity);
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int tcpci_tcpm_set_vconn(int port, int enable);
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int tcpci_tcpm_set_msg_header(int port, int power_role, int data_role);
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int tcpci_tcpm_set_rx_enable(int port, int enable);
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int tcpci_tcpm_get_message(int port, uint32_t *payload, int *head);
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int tcpci_tcpm_transmit(int port, enum tcpm_transmit_type type,
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uint16_t header, const uint32_t *data);
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int tcpci_tcpm_release(int port);
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#ifdef CONFIG_USB_PD_DUAL_ROLE_AUTO_TOGGLE
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int tcpci_tcpc_drp_toggle(int port, int enable);
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#endif
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#ifdef CONFIG_USB_PD_DISCHARGE_TCPC
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void tcpci_tcpc_discharge_vbus(int port, int enable);
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#endif
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int tcpci_tcpm_mux_init(int i2c_addr);
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int tcpci_tcpm_mux_set(int i2c_addr, mux_state_t mux_state);
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int tcpci_tcpm_mux_get(int i2c_addr, mux_state_t *mux_state);
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int tcpci_get_chip_info(int port, int renew,
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struct ec_response_pd_chip_info **chip_info);
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#endif /* __CROS_EC_USB_PD_TCPM_TCPCI_H */
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