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51d0fbb56c
The original _CHIPNAME for npcx ec in the openocd configuration file is npcx5m5g. As we introduce more npcx ec SKUs, it is not appropriate to keep using this name. This CL modifies the _CHIPNAME to a generic name(npcx_ec). BRANCH=none BUG=none TEST=./util/flash_ec --board=npcx7_evb; check the openocd log and make sure the _CHIPNAME is npcx_ec now. Signed-off-by: CHLin <CHLIN56@nuvoton.com> Change-Id: I49d298de1e43ac29f3e5535702595ee27225ac23 Signed-off-by: CHLin <CHLIN56@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/576604 Commit-Ready: Jun Lin <riverq@gmail.com> Tested-by: Jun Lin <riverq@gmail.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
62 lines
1.3 KiB
INI
62 lines
1.3 KiB
INI
# Copyright (c) 2014 The Chromium OS Authors. All rights reserved.
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# Use of this source code is governed by a BSD-style license that can be
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# found in the LICENSE file.
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#
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# nuvoton-m4 devices support both JTAG and SWD transports.
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#
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source [find target/swj-dp.tcl]
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME npcx_ec
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}
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if { [info exists ENDIAN] } {
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set _ENDIAN $ENDIAN
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} else {
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set _ENDIAN little
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}
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# Work-area is a space in RAM used for flash programming
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# By default use 16kB
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if { [info exists WORKAREASIZE] } {
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set _WORKAREASIZE $WORKAREASIZE
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} else {
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set _WORKAREASIZE 0x8000
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}
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#jtag scan chain
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if { [info exists CPUTAPID ] } {
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set _CPUTAPID $CPUTAPID
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} else {
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set _CPUTAPID 0x4BA00477
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}
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#jtag newtap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
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swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position \
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$_CHIPNAME.cpu -work-area-phys 0x200C0000 \
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-work-area-size $_WORKAREASIZE
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# JTAG speed
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adapter_khz 100
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adapter_nsrst_delay 100
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jtag_ntrst_delay 100
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# use sysresetreq to perform a system reset
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cortex_m reset_config sysresetreq
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#reset configuration
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reset_config trst_and_srst
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$_TARGETNAME configure -event reset-start {
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echo "NPCX Reset..."
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halt
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adapter_khz 1000
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}
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