mirror of
https://github.com/Telecominfraproject/OpenCellular.git
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cf9fcef328
Preparatory work to introduce a second SoC : 3/5 We split the drivers files which contain SoC specific drivers from the OS files which only depend the actual CPU core. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=None TEST=run EC firmware on BDS and test a few commands on the console. Change-Id: I598f8b23e074da9bd6b0e2ce6689c1075fe854f0
64 lines
1.4 KiB
ArmAsm
64 lines
1.4 KiB
ArmAsm
/* Copyright (c) 2012 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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#include "config.h"
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#define CONFIG_FW_SECT_OFF(section) CONFIG_FW_##section##_OFF
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#define CONFIG_FW_BASE(section) (CONFIG_FLASH_BASE + CONFIG_FW_SECT_OFF(section))
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OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
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OUTPUT_ARCH(arm)
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ENTRY(reset)
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MEMORY
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{
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FLASH (rx) : ORIGIN = CONFIG_FW_BASE(SECTION), LENGTH = CONFIG_FW_IMAGE_SIZE
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IRAM (rw) : ORIGIN = CONFIG_RAM_BASE, LENGTH = CONFIG_RAM_SIZE
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}
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SECTIONS
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{
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.text : {
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OUTDIR/core/CORE/init.o (.text)
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*(.text*)
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#ifdef COMPILE_FOR_RAM
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} > IRAM
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#else
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} > FLASH
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#endif
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. = ALIGN(4);
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.rodata : {
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__irqprio = .;
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*(.rodata.irqprio)
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__irqprio_end = .;
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. = ALIGN(4);
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__cmds = .;
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*(.rodata.cmds)
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__cmds_end = .;
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*(.rodata*)
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. = ALIGN(4);
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#ifdef COMPILE_FOR_RAM
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} > IRAM
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__ro_end = . ;
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.data : {
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#else
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} > FLASH
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__ro_end = . ;
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.data : AT(ADDR(.rodata) + SIZEOF(.rodata)) {
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#endif
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. = ALIGN(4);
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__data_start = .;
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*(.data.tasks)
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*(.data)
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. = ALIGN(4);
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__data_end = .;
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} > IRAM
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.bss : {
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. = ALIGN(4);
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__bss_start = .;
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*(.bss)
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. = ALIGN(4);
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__bss_end = .;
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} > IRAM
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/DISCARD/ : { *(.ARM.*) }
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}
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