mirror of
https://github.com/Telecominfraproject/OpenCellular.git
synced 2026-01-13 03:15:06 +00:00
a4c2b141f8
We found the api utility in ROM doesn't enable burst mode of GDMA. It influences the performance of FW download a lot. The CL modified GDMA for moving the code of the other region from flash to ram. And move a function that kicks off GMDA transactions to suspend ram in case this utility is erased by itself. This issue will be fixed in our next generation. Modified sources: 1. system.c: Implement GDMA bypass. 2. system_chip.h: Import flash addresses for GDMA bypass code. 3. registers.h: Add GDMA register definitions. 4. cortex-m/ec.lds.S: Add lowpower_ram2 section in linker script. BRANCH=none BUG=chrome-os-partner:56794 TEST=make BOARD=npcx_evb; test sysjump and measure download time Change-Id: I8490f8f2e5a8cdcb6fd10511878c4a4af8073bbf Signed-off-by: Mulin Chao <mlchao@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/381779 Commit-Ready: Shawn N <shawnn@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
352 lines
9.9 KiB
ArmAsm
352 lines
9.9 KiB
ArmAsm
/* Copyright (c) 2013 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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#include "config.h"
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#include "rsa.h"
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#define STRINGIFY0(name) #name
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#define STRINGIFY(name) STRINGIFY0(name)
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#ifdef RW_B_LDS
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#define FW_MEM_OFF_(section) CONFIG_##section##_B_MEM_OFF
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#else
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#define FW_MEM_OFF_(section) CONFIG_##section##_MEM_OFF
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#endif
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#define FW_MEM_OFF(section) (FW_MEM_OFF_(section))
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#define FW_OFF(section) (CONFIG_PROGRAM_MEMORY_BASE + FW_MEM_OFF(section))
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#define FW_SIZE_(section) CONFIG_##section##_SIZE
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#define FW_SIZE(section) FW_SIZE_(section)
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OUTPUT_FORMAT(BFD_FORMAT, BFD_FORMAT, BFD_FORMAT)
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OUTPUT_ARCH(BFD_ARCH)
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ENTRY(reset)
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MEMORY
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{
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#if defined(SECTION_IS_RO) && defined(NPCX_RO_HEADER)
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/*
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* Header structure used by npcx booter in RO region.
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* Please notice the location of header must be in front of FW
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* which needs copy. But header itself won't be copied to code ram
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* by booter.
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*/
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FLASH_HDR (rx) : ORIGIN = FW_OFF(RO_HDR), LENGTH = FW_SIZE(RO_HDR)
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FLASH (rx) : ORIGIN = FW_OFF(SECTION) + FW_SIZE(RO_HDR), \
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LENGTH = FW_SIZE(SECTION)
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#else
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FLASH (rx) : ORIGIN = FW_OFF(SECTION), LENGTH = FW_SIZE(SECTION)
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#endif
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#ifdef CONFIG_SHAREDLIB
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SHARED_LIB (rx) : ORIGIN = FW_OFF(SHAREDLIB), LENGTH = FW_SIZE(SHAREDLIB)
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#endif
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IRAM (rw) : ORIGIN = CONFIG_RAM_BASE, LENGTH = CONFIG_RAM_SIZE
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#ifdef CONFIG_EXTERNAL_STORAGE
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#ifdef CONFIG_REPLACE_LOADER_WITH_BSS_SLOW
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LDR_REGION(rw) : \
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ORIGIN = CONFIG_PROGRAM_MEMORY_BASE + CONFIG_LOADER_MEM_OFF, \
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LENGTH = CONFIG_LOADER_SIZE
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#endif /* defined(CONFIG_REPLACE_LOADER_WITH_BSS_SLOW) */
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CDRAM (rx) : \
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ORIGIN = CONFIG_PROGRAM_MEMORY_BASE + FW_MEM_OFF(SECTION), \
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LENGTH = FW_SIZE(SECTION)
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#endif /* CONFIG_EXTERNAL_STORAGE */
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#ifdef CONFIG_USB_RAM_SIZE
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USB_RAM (rw) : \
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ORIGIN = CONFIG_USB_RAM_BASE, \
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LENGTH = CONFIG_USB_RAM_SIZE * CONFIG_USB_RAM_ACCESS_SIZE / 2
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#endif
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}
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SECTIONS
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{
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#if defined(SECTION_IS_RO) && defined(NPCX_RO_HEADER)
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.header : {
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KEEP(*(.header))
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} > FLASH_HDR
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#endif
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#ifdef CONFIG_SHAREDLIB
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.roshared : {
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KEEP(*(.roshared*))
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} > SHARED_LIB
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#endif
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.text : {
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#if defined(SECTION_IS_RO) && defined(CONFIG_RO_HEAD_ROOM)
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. = . + CONFIG_RO_HEAD_ROOM;
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#endif
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#if defined(SECTION_IS_RW) && defined(CONFIG_RW_HEAD_ROOM)
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. = . + CONFIG_RW_HEAD_ROOM;
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#endif
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STRINGIFY(OUTDIR/core/CORE/init.o) (.text.vecttable)
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. = ALIGN(4);
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__version_struct_offset = .;
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KEEP(*(.rodata.ver))
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. = ALIGN(4);
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KEEP(*(.rodata.pstate))
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. = ALIGN(4);
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STRINGIFY(OUTDIR/core/CORE/init.o) (.text)
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*(.text*)
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#ifdef CONFIG_EXTERNAL_STORAGE
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. = ALIGN(4);
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__flash_lpfw_start = .;
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/* Entering deep idle FW for better power consumption */
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KEEP(*(.lowpower_ram))
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. = ALIGN(4);
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__flash_lpfw_end = .;
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__flash_lplfw_start = .;
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/* GDMA utilities for better FW download speed */
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KEEP(*(.lowpower_ram2))
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. = ALIGN(4);
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__flash_lplfw_end = .;
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} > CDRAM AT > FLASH
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#else
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} > FLASH
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#endif
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. = ALIGN(4);
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.rodata : {
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/* Symbols defined here are declared in link_defs.h */
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__irqprio = .;
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KEEP(*(.rodata.irqprio))
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__irqprio_end = .;
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. = ALIGN(4);
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__cmds = .;
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KEEP(*(SORT(.rodata.cmds*)))
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__cmds_end = .;
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. = ALIGN(4);
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__extension_cmds = .;
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KEEP(*(.rodata.extensioncmds))
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__extension_cmds_end = .;
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. = ALIGN(4);
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__hcmds = .;
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KEEP(*(.rodata.hcmds))
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__hcmds_end = .;
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. = ALIGN(4);
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__mkbp_evt_srcs = .;
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KEEP(*(.rodata.evtsrcs))
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__mkbp_evt_srcs_end = .;
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. = ALIGN(4);
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__hooks_init = .;
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KEEP(*(.rodata.HOOK_INIT))
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__hooks_init_end = .;
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__hooks_pre_freq_change = .;
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KEEP(*(.rodata.HOOK_PRE_FREQ_CHANGE))
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__hooks_pre_freq_change_end = .;
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__hooks_freq_change = .;
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KEEP(*(.rodata.HOOK_FREQ_CHANGE))
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__hooks_freq_change_end = .;
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__hooks_sysjump = .;
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KEEP(*(.rodata.HOOK_SYSJUMP))
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__hooks_sysjump_end = .;
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__hooks_chipset_pre_init = .;
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KEEP(*(.rodata.HOOK_CHIPSET_PRE_INIT))
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__hooks_chipset_pre_init_end = .;
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__hooks_chipset_startup = .;
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KEEP(*(.rodata.HOOK_CHIPSET_STARTUP))
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__hooks_chipset_startup_end = .;
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__hooks_chipset_resume = .;
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KEEP(*(.rodata.HOOK_CHIPSET_RESUME))
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__hooks_chipset_resume_end = .;
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__hooks_chipset_suspend = .;
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KEEP(*(.rodata.HOOK_CHIPSET_SUSPEND))
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__hooks_chipset_suspend_end = .;
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__hooks_chipset_shutdown = .;
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KEEP(*(.rodata.HOOK_CHIPSET_SHUTDOWN))
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__hooks_chipset_shutdown_end = .;
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__hooks_chipset_reset = .;
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KEEP(*(.rodata.HOOK_CHIPSET_RESET))
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__hooks_chipset_reset_end = .;
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__hooks_ac_change = .;
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KEEP(*(.rodata.HOOK_AC_CHANGE))
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__hooks_ac_change_end = .;
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__hooks_lid_change = .;
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KEEP(*(.rodata.HOOK_LID_CHANGE))
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__hooks_lid_change_end = .;
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__hooks_tablet_mode_change = .;
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KEEP(*(.rodata.HOOK_TABLET_MODE_CHANGE))
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__hooks_tablet_mode_change_end = .;
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__hooks_pwrbtn_change = .;
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KEEP(*(.rodata.HOOK_POWER_BUTTON_CHANGE))
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__hooks_pwrbtn_change_end = .;
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__hooks_charge_state_change = .;
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KEEP(*(.rodata.HOOK_CHARGE_STATE_CHANGE))
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__hooks_charge_state_change_end = .;
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__hooks_battery_soc_change = .;
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KEEP(*(.rodata.HOOK_BATTERY_SOC_CHANGE))
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__hooks_battery_soc_change_end = .;
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__hooks_tick = .;
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KEEP(*(.rodata.HOOK_TICK))
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__hooks_tick_end = .;
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__hooks_second = .;
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KEEP(*(.rodata.HOOK_SECOND))
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__hooks_second_end = .;
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__deferred_funcs = .;
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KEEP(*(.rodata.deferred))
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__deferred_funcs_end = .;
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__usb_desc = .;
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KEEP(*(.rodata.usb_desc_conf))
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KEEP(*(SORT(.rodata.usb_desc*)))
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__usb_desc_end = .;
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. = ALIGN(4);
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KEEP(*(.rodata.usb_ep))
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. = ALIGN(4);
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*(.rodata*)
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#if defined(SECTION_IS_RO) && defined(CONFIG_FLASH)
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. = ALIGN(64);
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KEEP(*(.google))
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#endif
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. = ALIGN(4);
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#ifdef CONFIG_EXTERNAL_STORAGE
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} > CDRAM AT > FLASH
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#else
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} > FLASH
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#endif
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__ro_end = . ;
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.bss : {
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/*
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* Align to 512 bytes. This is convenient when some memory block
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* needs big alignment. This is the beginning of the RAM, so there
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* is usually no penalty on aligning this.
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*/
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. = ALIGN(512);
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__bss_start = .;
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*(.bss.big_align)
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/* Stacks must be 64-bit aligned */
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. = ALIGN(8);
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*(.bss.system_stack)
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/* Rest of .bss takes care of its own alignment */
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*(.bss)
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/*
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* Reserve space for deferred function firing times. Each time is a
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* uint64_t, each func is a 32-bit pointer, thus the scaling factor of
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* two. The 8 byte alignment of uint64_t is required by the ARM ABI.
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*/
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. = ALIGN(8);
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__deferred_until = .;
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. += (__deferred_funcs_end - __deferred_funcs) * (8 / 4);
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__deferred_until_end = .;
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#ifdef CONFIG_REPLACE_LOADER_WITH_BSS_SLOW
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. = ALIGN(4);
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__bss_end = .;
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#endif /* defined(CONFIG_REPLACE_LOADER_WITH_BSS_SLOW) */
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} > IRAM
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.bss.slow : {
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/* Region of RAM reclaimed from the little firmware(LFW). */
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*(.bss.slow)
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#ifdef CONFIG_REPLACE_LOADER_WITH_BSS_SLOW
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} > LDR_REGION
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#else
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/*
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* Not replacing the loader, so .bss.slow is part of .bss. It needs to
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* be followed by __bss_end so that .bss.slow will be zeroed by init.
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*/
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. = ALIGN(4);
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__bss_end = .;
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} > IRAM
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#endif /* defined(CONFIG_REPLACE_LOADER_WITH_BSS_SLOW) */
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#ifdef CONFIG_EXTERNAL_STORAGE
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.data : AT(LOADADDR(.rodata) + SIZEOF(.rodata)) {
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#else
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.data : AT(ADDR(.rodata) + SIZEOF(.rodata)) {
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#endif
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. = ALIGN(4);
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__data_start = .;
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*(.data.tasks)
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*(.data)
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#ifdef CONFIG_MPU
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/* It has to be aligned by 32 bytes to be a valid MPU region. */
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. = ALIGN(32);
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__iram_text_start = .;
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#else
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. = ALIGN(4);
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#endif
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*(.iram.text)
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#ifdef CONFIG_MPU
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. = ALIGN(32);
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__iram_text_end = .;
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#else
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. = ALIGN(4);
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#endif
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__data_end = .;
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/* Shared memory buffer must be at the end of preallocated RAM, so it
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* can expand to use all the remaining RAM. */
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__shared_mem_buf = .;
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/* Tag at end of firmware image so that we can find the image size.
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* This may be overwritten by the shared memory buffer; that's ok
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* because we only use it to find the image size in flash. */
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. = ALIGN(4);
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BYTE(0x45);
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BYTE(0x4e);
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BYTE(0x44);
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BYTE(0xea);
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/* NOTHING MAY GO AFTER THIS! */
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} > IRAM
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/* The linker won't notice if the .data section is too big to fit,
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* apparently because we're sending it into IRAM, not FLASH. The following
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* symbol isn't used by the code, but running "objdump -t *.elf | grep hey"
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* will let us check how much flash space we're actually using. The
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* explicit ASSERT afterwards will cause the linker to abort if we use too
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* much. */
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__hey_flash_used = LOADADDR(.data) + SIZEOF(.data) - FW_OFF(SECTION);
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ASSERT((FW_SIZE(SECTION)
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#if defined(CONFIG_RWSIG) && defined(SECTION_IS_RO)
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- CONFIG_RO_PUBKEY_SIZE
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#endif
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#if defined(CONFIG_RWSIG) && defined(SECTION_IS_RW)
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- CONFIG_RW_SIG_SIZE
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#endif
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) >= (LOADADDR(.data) + SIZEOF(.data) - FW_OFF(SECTION)),
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"No room left in the flash")
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#ifdef CONFIG_USB_RAM_SIZE
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.usb_ram (NOLOAD) : {
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__usb_ram_start = .;
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. = ALIGN(8);
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*(.usb_ram.btable)
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*(.usb_ram.data)
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} > USB_RAM
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#endif
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#if !(defined(SECTION_IS_RO) && defined(CONFIG_FLASH))
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/DISCARD/ : {
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*(.google)
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}
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#endif
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/DISCARD/ : { *(.ARM.*) }
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}
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