Vadim Bendebury 2c0b6b7d3d g: fix sps interrupt assertion logic ...

The SPI initialization interrupt needs to be generated only when there
was actual data received while CS was asserted and after transaction
finished (i.e. CS is de-asserted).

BRANCH=cr50
BUG=b:35774896
TEST=verified on a bob with updated AP firmware

Change-Id: Ifc4b11870d511d47e9607a2001d845ee1e153f7f
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/452792
Reviewed-by: Mary Ruthven <mruthven@chromium.org>

2017-03-10 08:34:22 -08:00

..

g

g: fix sps interrupt assertion logic

2017-03-10 08:34:22 -08:00

host

gpio: Add function to clear pending interrupt

2017-03-01 16:36:24 -08:00

ish

system: Add generic bbram read / write routines

2017-02-24 15:23:24 -08:00

it83xx

gpio: Add function to clear pending interrupt

2017-03-01 16:36:24 -08:00

lm4

gpio: Add function to clear pending interrupt

2017-03-01 16:36:24 -08:00

mec1322

gpio: Add function to clear pending interrupt

2017-03-01 16:36:24 -08:00

npcx

npcx: lpc: Remove WUI57 of table 0 initialization on eSPI mode

2017-03-06 14:29:48 -08:00

nrf51

system: Add generic bbram read / write routines

2017-02-24 15:23:24 -08:00

stm32

chip/stm32/usb: Add support for USB SET_FEATURE control requests

2017-03-08 03:13:19 -08:00