Aaron Durbin 100b14d12b rambi: handle single channel configs ...

Some 1.5 boards have a single channel ram configuration.
Accomodate such configs.

BUG=chrome-os-partner:22865
BRANCH=None
TEST=Built and booted ChromeOS.

Change-Id: I513327e47b9211d2dd1ea960d7da671a3773cb91
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/178340
Reviewed-by: Nick Sanders <nsanders@chromium.org>
Tested-by: Bernie Thompson <bhthompson@chromium.org>
Tested-by: Nick Sanders <nsanders@chromium.org>
Reviewed-on: http://review.coreboot.org/4983
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>

2014-05-07 22:08:04 +02:00

..

arch

Introduce stage-specific architecture for coreboot

2014-05-06 20:23:31 +02:00

console

console: Fix UART selection prompt

2014-04-30 23:47:28 +02:00

cpu

Introduce stage-specific architecture for coreboot

2014-05-06 20:23:31 +02:00

device

Introduce stage-specific architecture for coreboot

2014-05-06 20:23:31 +02:00

drivers

drivers/pc80/Kconfig: Do not init PS/2 keyboard if GRUB 2 is chosen as payload

2014-05-02 15:05:07 +02:00

ec

Declare recovery and developer modes outside ChromeOS

2014-05-01 15:38:41 +02:00

include

superio/common/conf_mode: Provide another common pnp entry/exit

2014-05-07 21:36:48 +02:00

lib

reg_script: add iosf lpss port access

2014-05-07 12:05:01 +02:00

mainboard

rambi: handle single channel configs

2014-05-07 22:08:04 +02:00

northbridge

northbridge/intel/sandybridge/pei_data.h: Fix typo in hig*h*est in comment

2014-05-06 13:55:39 +02:00

soc

baytrail: romstage: Add config option to enable RMT

2014-05-07 22:07:03 +02:00

southbridge

AGESA SPI: Fix Kconfig options

2014-04-29 17:31:40 +02:00

superio

superio/common/conf_mode: Provide another common pnp entry/exit

2014-05-07 21:36:48 +02:00

vendorcode

Introduce stage-specific architecture for coreboot

2014-05-06 20:23:31 +02:00

Kconfig

Introduce stage-specific architecture for coreboot

2014-05-06 20:23:31 +02:00