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6401188024
Some Intel SoC may need preparation before reset can be properly handled. Add callback that chip/soc code can implement. BUG=chrome-os-partner:55055 Change-Id: I45857838e1a306dbcb9ed262b55e7db88a8944e5 Signed-off-by: Andrey Petrov <andrey.petrov@intel.com> Reviewed-on: https://review.coreboot.org/15720 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
16 lines
361 B
C
16 lines
361 B
C
#ifndef RESET_H
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#define RESET_H
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#if CONFIG_HAVE_HARD_RESET
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void hard_reset(void);
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#else
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#define hard_reset() do {} while(0)
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#endif
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void soft_reset(void);
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void cpu_reset(void);
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/* Some Intel SoCs use a special reset that is specific to SoC */
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void global_reset(void);
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/* Some Intel SoCs may need to prepare/wait before reset */
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void reset_prepare(void);
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#endif
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