CHLin 16f4c65daf npcx: fixed the assembly code of deep idle bypass ...

The original assembly code of deep sleep bypass will cause build error
if both CONFIG_LOW_POWER_IDLE and CONFIG_LTO are defined when buildiing
board glkrvp/zoombini. This CL fixed it by change the bypass assembly code
from:
            asm ("push {r0-r5}\n"
                 "ldr r0, =0x100A8000\n"
                 "wfi\n"
                 "ldm r0, {r0-r5}\n"
                 "pop {r0-r5}\n"
                 "isb\n"
            );
to:
            asm ("push {r0-r5}\n"
                 "wfi\n"
                 "ldm %0, {r0-r5}\n"
                 "pop {r0-r5}\n"
                 "isb\n" :: "r" (0x100A8000)
            );

BRANCH=none
BUG=none
TEST=No build errors for "make buildall".
TEST=build zoombini/glkrvp with CONFIG_LOW_POWER_IDLE and CONFIG_LTO,
no build errors.
TEST=build npcx7_evb/npcx_evb and do stress test for deep idle->wakeup
on EVB, no symptom observed.

Change-Id: I90b13b4baf418e3f4b3234d4811e3978b6436aac
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
Signed-off-by: CHLin <CHLIN56@nuvoton.com>
Reviewed-on: https://chromium-review.googlesource.com/756535
Commit-Ready: CH Lin <chlin56@nuvoton.com>
Tested-by: CH Lin <chlin56@nuvoton.com>

2017-11-09 21:46:07 -08:00

..

cortex-m

npcx: fixed the assembly code of deep idle bypass

2017-11-09 21:46:07 -08:00

cortex-m0

cortex-m0: Use assembly exception handlers for task switching

2017-08-28 10:55:41 -07:00

host

cleanup: Remove jtag_pre_init()

2017-09-07 15:01:05 -07:00

minute-ia

ish: mutex_lock() fix

2017-10-26 15:57:46 -07:00

nds32

nds32: add built-in function

2017-10-26 02:33:46 -07:00