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692428e1a6
[chip config]
1. No hardware specific udelay().
2. Enable watchdog.
[watchdog]
3. Watchdog period is "CONFIG_WATCHDOG_PERIOD_MS" of config.h.
4. Watchdog auxiliary timer period is "CONFIG_AUX_TIMER_PERIOD_MS".
[task and irq]
5. Write 1 to clear interrupt pending status, no |.
6. A global variable for store interrupt number of software interrupt.
[uart]
7. Always reset UART module before config it.
[hwtimer]
8. Use more external timers for HW timer module.
[task]
9. Fix task profiling.
Signed-off-by: Dino Li <dino.li@ite.com.tw>
BRANCH=none
BUG=none
TEST=[watchdog]
1. console "waitms 1100", only pre-watchdog warning message.
2. console "waitms 1600", warning message and watchdog reset.
[hwtimer]
3. console commands "gettime", "timerinfo", and "forcetime".
4. enable hook debug and there is no delayed by more than 10%
warning message over 48 hours.
5. There is no watchdog reset too.
[task]
6. console 'taskinfo'
Task Ready Name Events Time (s) StkUsed
0 R << idle >> 00000000 32.927724 308/512
1 HOOKS 00000000 0.034267 372/768
2 R CONSOLE 00000000 0.116763 468/768
3 HOSTCMD 00000000 0.000641 372/512
4 KEYPROTO 00000000 0.000042 212/512
5 KEYSCAN 00000000 0.000908 356/512
IRQ counts by type:
38 2932
155 1
158 261
160 67
Service calls: 87
Total exceptions: 3348
Task switches: 167
Task switching started: 0.001999 s
Time in tasks: 33.282819 s
Time in exceptions: 0.164717 s
Change-Id: I234085cec231cd855d2a5e639ea1b0966c61d796
Reviewed-on: https://chromium-review.googlesource.com/296939
Commit-Ready: Dino Li <dino.li@ite.com.tw>
Tested-by: Dino Li <dino.li@ite.com.tw>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
102 lines
3.2 KiB
ArmAsm
102 lines
3.2 KiB
ArmAsm
/* Copyright (c) 2013 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*
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* Context switching
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*/
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#include "config.h"
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.text
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/**
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* Task context switching
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*
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* Change the task scheduled after returning from an interruption.
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*
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* This function must be called in interrupt context.
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*
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* Save the registers of the current task below the interrupt context on
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* its task, then restore the live registers of the next task and set the
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* process stack pointer to the new stack.
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*
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* $r0: pointer to the task to switch from
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* $r1: pointer to the task to switch to
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* $r2: pointer to the stack where the interrupt entry context is saved
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*
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* the structure of the saved context on the stack is :
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* (top to bottom)
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* sp, lp, fp, r15, r5, r4, r3, r2, r1, r0, r10, r9, r8, r7, r6, ipc, ipsw
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* interrupt entry frame <|>
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*/
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.global __switch_task
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__switch_task:
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/* get the (new) highest priority task pointer in r0 */
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jal next_sched_task
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movi55 $r3, 0
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/* pointer to the current task (which are switching from) */
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lwi.gp $r1, [ + current_task]
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/* reset the re-scheduling request */
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swi.gp $r3, [ + need_resched]
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/* Nothing to do: let's return to keep the same task scheduled */
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beq $r1, $r0, 1f
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/* save our new scheduled task */
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swi.gp $r0, [ + current_task]
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/* get the program status word saved at exception entry */
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mfsr $r4, $IPSW /* to save SP_ADJ bit */
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/* get the task program counter saved at exception entry */
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mfsr $r5, $IPC
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/* get the new scheduled task stack pointer */
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lw $r3, [$r0]
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/* save ipsw, ipc, r6, r7, r8, r9, r10 on the current process stack */
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smw.adm $r4, [$fp], $r10, 0
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/* restore ipsw, ipc, r6, r7, r8, r9, r10 from the next stack context */
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lmw.bim $r4, [$r3], $r10, 0
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/* set the program status word to restore SP_ADJ bit */
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mtsr $r4, $IPSW
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/* set the task program counter to restore at exception exit */
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mtsr $r5, $IPC
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/* save the task stack pointer in its context */
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sw $fp, [$r1]
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/* barrier: ensure IPC is taken into account before IRET */
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dsb
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/* exception frame pointer for the new task */
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mov55 $fp, $r3
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1: /* un-pile the interruption entry context */
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/* isr exit */
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jal end_irq_handler
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/* restore r0-r5 */
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lmw.bim $r0, [$fp], $r5, 0
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/* restore r15, fp, lp and sp */
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lmw.bi $r15, [$fp], $r15, 0xb
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/* restore PC and PSW */
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iret
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/**
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* Start the task scheduling.
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*
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* $r0 is a pointer to task_stack_ready, which is set to 1 after
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* the task stack is set up.
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*/
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.global __task_start
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__task_start:
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/* area used as dummy thread stack for the first switch */
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la $r3, scratchpad
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movi55 $r4, 1
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movi55 $r2, 0 /* syscall 3rd parameter : not an IRQ emulation */
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movi55 $r1, 0 /* syscall 2nd parameter : re-schedule nothing */
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movi55 $r0, 0 /* syscall 1st parameter : de-schedule nothing */
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/* put the dummy stack pointer at the top of the stack in scratchpad */
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addi $sp, $r3, 4 * 16
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/* we are ready to re-schedule */
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swi.gp $r4, [ + need_resched]
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/* trigger scheduling to execute the task with the highest priority */
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syscall 0
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/* we should never return here: set code to EC_ERROR_UNKNOWN */
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movi55 $r0, 0x1
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ret5 $lp
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