Raul E Rangel 790534104a soc/amd/stoneyridge: Prevent reboot in romstage ...

By setting this register in bootblock AmdInitEnv will no longer trigger
a reset in romstage. This fixes a few vboot test failures and also
speeds up boot time.

BUG=b:111610455
TEST=Built grunt and made sure bootblock only happens once on cold boot,
and S3 resume.

Change-Id: Ie19f7a14deaef45ac63156bec6946273c1b9447e
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Reviewed-on: https://review.coreboot.org/27876
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>

2018-08-08 21:52:26 +00:00

..

amd

soc/amd/stoneyridge: Prevent reboot in romstage

2018-08-08 21:52:26 +00:00

broadcom

soc/broadcom/cygnus: Get rid of device_t

2018-06-04 09:21:04 +00:00

cavium

soc/cavium/cn81xx: Use ATF from blobs repo

2018-07-30 18:47:26 +00:00

imgtec

soc/imgtec/pistachio: Get rid of device_t

2018-06-04 09:18:19 +00:00

intel

soc/intel/apollolake: add new dimm info saving API

2018-08-08 16:43:50 +00:00

lowrisc

riscv: add support for modifying compiler options

2018-07-17 18:09:43 +00:00

marvell

soc/marvell/mvmap2315: Get rid of device_t

2018-06-04 09:18:05 +00:00

mediatek

mediatek/mt8183: Add SPI support

2018-07-27 05:35:23 +00:00

nvidia

src/soc: Use "foo *bar" instead of "foo* bar"

2018-07-09 09:31:10 +00:00

qualcomm

sdm845: Implement bitbang UART for bootblock

2018-08-07 20:55:33 +00:00

rockchip

src/soc: Get rid of whitespace before tab

2018-06-04 09:20:52 +00:00

samsung

src/soc: Use "foo *bar" instead of "foo* bar"

2018-07-09 09:31:10 +00:00

sifive

sifive/fu540: add empty sdram init and size functions

2018-07-18 07:54:54 +00:00

ucb

riscv: add support for modifying compiler options

2018-07-17 18:09:43 +00:00