Werner Zeh 2a84445748 fsp_baytrail: Add macros to define 20K pull-up and down ...

Add two macros to gpio.h which allow to setup 20K
pull-up or pull-down resistor for a given GPIO.

Change-Id: Ie3bc4d40df588ed682cc692e2a80527b9e62a483
Signed-off-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-on: http://review.coreboot.org/8402
Reviewed-by: Martin Roth <gaumless@gmail.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>

2015-02-13 09:29:28 +01:00

..

arch

Get rid of .car.global_data warnings for GCC build

2015-02-09 17:44:02 +01:00

console

CBMEM console: Fix and enhance pre-RAM support

2015-01-27 22:44:17 +01:00

cpu

cpu/amd/model_10xxx: add Propus (00100F52h BL-C2) equivalent id

2015-02-11 23:10:44 +01:00

device

PCI subsystem: Remove AGP bridge type

2015-02-10 09:38:32 +01:00

drivers

Fix source code permissions

2015-02-13 01:48:23 +01:00

ec

vboot2: read dev and recovery switch

2015-01-27 01:43:31 +01:00

include

PCI subsystem: Remove AGP bridge type

2015-02-10 09:38:32 +01:00

lib

TPM: Fix whitespace

2015-02-06 00:25:59 +01:00

mainboard

AMD K8 boards’ romstage.c: Spell sync*hr*onize correctly

2015-02-12 02:27:07 +01:00

northbridge

Fix source code permissions

2015-02-13 01:48:23 +01:00

soc

fsp_baytrail: Add macros to define 20K pull-up and down

2015-02-13 09:29:28 +01:00

southbridge

Intel FSP platforms: Fix timestamps

2015-02-09 11:41:34 +01:00

superio

superio/fintek: Add required changes so F81216H can be used

2015-02-04 15:45:39 +01:00

vendorcode

intel/rangeley: Update UPD_DATA_REGION to support POST-GOLD 2 FSP

2015-01-31 23:09:26 +01:00

Kconfig

payloads/seabios: Enable SeaVGABIOS option if native text init supported

2015-02-12 04:41:39 +01:00