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5cfa02b03c
Prior x86 boards have had GPIO for toggling RCIN directly on the PCH, although many likely had HW-assisted methods as well. With eve we need to generate an eSPI Virtual Wire for RCIN, but in reality software control over RCIN Virtual Wire is not available with the npcx EC, so the legacy LPC interface for pulsing KBRST must be used instead as this is the only way to generate RCIN. This method will likely vary on different EC chips, but for skylake it can just be abstracted into the LPC module. BUG=chrome-os-partner:58666 BRANCH=none TEST=successful 'apreset warm' on eve EC console Change-Id: I7f9e7544a72877f75d05593b5e41f2f09a50e1c9 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/400037 Reviewed-by: Mulin Chao <mlchao@nuvoton.com> Reviewed-by: Shawn N <shawnn@chromium.org>
131 lines
2.8 KiB
C
131 lines
2.8 KiB
C
/* Copyright (c) 2012 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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/* LPC module for Chrome EC */
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#ifndef __CROS_EC_LPC_H
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#define __CROS_EC_LPC_H
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#include "common.h"
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/**
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* Return a pointer to the memory-mapped buffer.
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*
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* This buffer is writable at any time, and the host can read it at any time.
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*/
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uint8_t *lpc_get_memmap_range(void);
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/**
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* Return true if keyboard data is waiting for the host to read (TOH is still
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* set).
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*/
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int lpc_keyboard_has_char(void);
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/* Return true if the FRMH is still set */
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int lpc_keyboard_input_pending(void);
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/**
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* Send a byte to host via keyboard port 0x60.
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*
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* @param chr Byte to send
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* @param send_irq If non-zero, asserts IRQ
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*/
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void lpc_keyboard_put_char(uint8_t chr, int send_irq);
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/**
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* Clear the keyboard buffer.
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*/
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void lpc_keyboard_clear_buffer(void);
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/**
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* Send an IRQ to host if there is a byte in buffer already.
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*/
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void lpc_keyboard_resume_irq(void);
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/**
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* Return non-zero if the COMx interface has received a character.
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*/
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int lpc_comx_has_char(void);
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/**
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* Return the next character pending on the COMx interface.
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*/
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int lpc_comx_get_char(void);
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/**
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* Put a character to the COMx LPC interface.
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*/
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void lpc_comx_put_char(int c);
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/*
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* Low-level LPC interface for host events.
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*
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* For use by host_event_commands.c. Other modules should use the methods
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* provided in host_command.h.
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*/
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/* Types of host events */
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enum lpc_host_event_type {
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LPC_HOST_EVENT_SMI = 0,
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LPC_HOST_EVENT_SCI,
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LPC_HOST_EVENT_WAKE,
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};
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/**
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* Set the event state.
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*/
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void lpc_set_host_event_state(uint32_t mask);
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/**
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* Clear and return the lowest host event.
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*/
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int lpc_query_host_event_state(void);
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/**
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* Set the event mask for the specified event type.
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*
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* @param type Event type
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* @param mask New event mask
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*/
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void lpc_set_host_event_mask(enum lpc_host_event_type type, uint32_t mask);
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/**
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* Return the event mask for the specified event type.
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*/
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uint32_t lpc_get_host_event_mask(enum lpc_host_event_type type);
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/**
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* Set the EC_LPC_STATUS_* mask for the specified status.
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*/
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void lpc_set_acpi_status_mask(uint8_t mask);
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/**
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* Clear the EC_LPC_STATUS_* mask for the specified status.
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*/
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void lpc_clear_acpi_status_mask(uint8_t mask);
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/**
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* Return the state of platform reset.
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*
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* @return non-zero if PLTRST# is asserted (low); 0 if not asserted (high).
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*/
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int lpc_get_pltrst_asserted(void);
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/**
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* Reset the host with KBRST# or RCIN#
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*/
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void lpc_host_reset(void);
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/* Disable LPC ACPI interrupts */
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void lpc_disable_acpi_interrupts(void);
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/* Enable LPC ACPI interrupts */
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void lpc_enable_acpi_interrupts(void);
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void lpc_enable_wake_mask_for_lid_open(void);
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void lpc_disable_wake_mask_for_lid_open(void);
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#endif /* __CROS_EC_LPC_H */
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