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Data RAM write latency: 2 cycles Data RAM read latency: 2 cycles Data RAM setup latency: 1 cycle Tag RAM write latency: 1 cycle Tag RAM read latency: 1 cycle Tag RAM setup latency: 1 cycle BUG=None TEST=Boot Veyron Pinky Change-Id: I1d710f65114be6a976aa3fe23b076e89c14ac8b8 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 421c2e5ba44f1693f8b3c869289fc93ab9ef5965 Original-Change-Id: Ic9c909b7913d434bd40016c6a820ddff7e991634 Original-Signed-off-by: huang lin <hl@rock-chips.com> Original-Reviewed-on: https://chromium-review.googlesource.com/223713 Original-Reviewed-by: Doug Anderson <dianders@chromium.org> Original-Commit-Queue: Doug Anderson <dianders@chromium.org> Reviewed-on: http://review.coreboot.org/9347 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>