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9aba3baf15
Since TSU6721 processing is integrated into PMU task, an interrupt closely following previous one may be dropped. We should check interrupt status before yeilding control. BUG=chrome-os-partner:14319, chrome-os-partner:14318 TEST=Boot on Spring. Check TSU6721 functionality. BRANCH=none Change-Id: I7ce1c70a214bb4afc9456eb206203cc6c3fe2f33 Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/43862 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
109 lines
3.1 KiB
C
109 lines
3.1 KiB
C
/* Copyright (c) 2012 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*
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* TI TSU6721 USB port switch.
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*/
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#ifndef TSU6721_H
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#define TSU6721_H
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#define TSU6721_REG_DEV_ID 0x01
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#define TSU6721_REG_CONTROL 0x02
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#define TSU6721_REG_INT1 0x03
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#define TSU6721_REG_INT2 0x04
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#define TSU6721_REG_INT_MASK1 0x05
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#define TSU6721_REG_INT_MASK2 0x06
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#define TSU6721_REG_ADC 0x07
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#define TSU6721_REG_TIMING1 0x08
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#define TSU6721_REG_TIMING2 0x09
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#define TSU6721_REG_DEV_TYPE1 0x0A
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#define TSU6721_REG_DEV_TYPE2 0x0B
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#define TSU6721_REG_BUTTON1 0x0C
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#define TSU6721_REG_BUTTON2 0x0D
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#define TSU6721_REG_MANUAL1 0x13
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#define TSU6721_REG_MANUAL2 0x14
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#define TSU6721_REG_DEV_TYPE3 0x15
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#define TSU6721_REG_RESET 0x1B
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#define TSU6721_REG_TIMER 0x20
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#define TSU6721_REG_OCP1 0x21
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#define TSU6721_REG_OCP2 0x22
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#define TSU6721_CTRL_AUTO (1 << 2)
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enum tsu6721_mux {
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TSU6721_MUX_AUTO = 0x00,
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TSU6721_MUX_USB = 0x24,
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TSU6721_MUX_AUDIO = 0x48,
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TSU6721_MUX_UART = 0x6C,
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};
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#define TSU6721_INT_ATTACH 0x0001
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#define TSU6721_INT_DETACH 0x0002
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#define TSU6721_INT_KP 0x0004
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#define TSU6721_INT_LKP 0x0008
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#define TSU6721_INT_LKR 0x0010
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#define TSU6721_INT_OVP_EN 0x0020
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#define TSU6721_INT_OCP_EN 0x0040
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#define TSU6721_INT_OVP_OCP_OTP_DIS 0x0080
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#define TSU6721_INT_AV_CHANGE 0x0100
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#define TSU6721_INT_RES_ATTACH 0x0200
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#define TSU6721_INT_ADC_CHANGE 0x0400
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#define TSU6721_INT_STUCK_KEY 0x0800
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#define TSU6721_INT_STUCK_KEY_RCV 0x1000
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#define TSU6721_INT_CONNECT 0x2000
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#define TSU6721_INT_OTP_EN 0x4000
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#define TSU6721_INT_VBUS 0x8000
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#define TSU6721_TYPE_NONE 0x000000
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#define TSU6721_TYPE_OTG 0x000080
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#define TSU6721_TYPE_DCP 0x000040
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#define TSU6721_TYPE_CDP 0x000020
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#define TSU6721_TYPE_CHG12 0x000010
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#define TSU6721_TYPE_UART 0x000008
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#define TSU6721_TYPE_USB_HOST 0x000004
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#define TSU6721_TYPE_AUDIO2 0x000002
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#define TSU6721_TYPE_AUDIO1 0x000001
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#define TSU6721_TYPE_AUDIO3 0x008000
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#define TSU6721_TYPE_JIG_UART_ON 0x000400
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#define TSU6721_TYPE_U200_CHG 0x400000
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#define TSU6721_TYPE_APPLE_CHG 0x200000
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#define TSU6721_TYPE_NON_STD_CHG 0x040000
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/* VBUS_DEBOUNCED might show up together with other type */
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#define TSU6721_TYPE_VBUS_DEBOUNCED 0x020000
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/* Initialize TSU6721. */
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void tsu6721_init(void);
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/* Read TSU6721 register. */
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uint8_t tsu6721_read(uint8_t reg);
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/* Write TSU6721 register. */
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void tsu6721_write(uint8_t reg, uint8_t val);
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/* Enable interrupts. */
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void tsu6721_enable_interrupts(void);
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/* Disable all interrupts. */
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void tsu6721_disable_interrupts(void);
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/* Set interrupt mask. */
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void tsu6721_set_interrupt_mask(uint16_t mask);
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/* Get and clear current interrupt status. Return value is a combination of
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* TSU6721_INT_* */
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int tsu6721_get_interrupts(void);
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/* Get but keep interrupt status. Return value is a combination of
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* TSU6721_INT_* */
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int tsu6721_peek_interrupts(void);
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/* Get attached device type. Return value is one or a combination of
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* TSU6721_TYPE_* */
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int tsu6721_get_device_type(void);
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/* Control TSU6721 mux. */
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int tsu6721_mux(enum tsu6721_mux sel);
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#endif /* TSU6721_H */
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