Xiang Wang 387417be03 riscv: add support to check ISA extension ...

Add support to check ISA extension for RISC-V.

Change-Id: I5982fb32ed1dd435059edc6aa0373bffa899e160
Signed-off-by: Xiang Wang <wxjstz@126.com>
Reviewed-on: https://review.coreboot.org/27410
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-by: Philipp Hug <philipp@hug.cx>

2018-07-11 10:44:08 +00:00

..

acpi

arch/x86: Add common AMD ACPI hardware definitions

2017-11-10 19:15:38 +00:00

arch

riscv: add support to check ISA extension

2018-07-11 10:44:08 +00:00

commonlib

src/{arch,commonlib,cpu}: Use "foo *bar" instead of "foo* bar"

2018-07-09 09:26:18 +00:00

console

arch/x86: Drop leftover ROMCC console support

2018-06-08 03:31:12 +00:00

cpu

src/{arch,commonlib,cpu}: Use "foo *bar" instead of "foo* bar"

2018-07-09 09:26:18 +00:00

device

src/{device,drivers}: Use "foo *bar" instead of "foo* bar"

2018-07-09 09:27:34 +00:00

drivers

src/{device,drivers}: Use "foo *bar" instead of "foo* bar"

2018-07-09 09:27:34 +00:00

ec

src/{ec,include,lib}: Use "foo *bar" instead of "foo* bar"

2018-07-09 09:28:35 +00:00

include

src/{ec,include,lib}: Use "foo *bar" instead of "foo* bar"

2018-07-09 09:28:35 +00:00

lib

src/{ec,include,lib}: Use "foo *bar" instead of "foo* bar"

2018-07-09 09:28:35 +00:00

mainboard

soc/cavium: Add secondary CPU support

2018-07-10 07:07:09 +00:00

northbridge

src/northbridge: Use "foo *bar" instead of "foo* bar"

2018-07-09 09:29:53 +00:00

security

src: Add missing license headers

2018-07-06 15:30:59 +00:00

soc

soc/cavium: Add secondary CPU support

2018-07-10 07:07:09 +00:00

southbridge

src/sb/amd/pi/hudson/sd.c: disable SDR50 tuning and set correct clock freq in SD2.0 mode

2018-07-10 09:53:22 +00:00

superio

superio: move files to match the common naming scheme

2018-07-06 16:47:21 +00:00

vendorcode

cavium: Add CN81xx SoC and eval board support

2018-07-10 07:01:57 +00:00

Kconfig

stage_cache: Disable when APCI S3 is not possible

2018-06-27 02:20:11 +00:00