Subrata Banik 3e55044645 soc/intel/cannonlake: Add proper support to enable UART2 in 16550 mode ...

Need to perform a dummy read in order to activate LPSS UART's
16550 8-bit compatibility mode.

TEST=Able to get serial log in both 32 bit and 8 bit mode through
LPSS UART2 based on CONFIG_DRIVERS_UART_8250MEM_32 and
CONFIG_DRIVERS_UART_8250MEM selection.

Change-Id: Ief58fdcb8a91f9951a48c3bd7490b1c7fee17e48
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/20940
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

2017-08-16 23:30:12 +00:00

..

apollolake

soc/intel/apollolake: Rename SRAM BAR0 and BAR2 macros

2017-08-15 23:11:16 +00:00

baytrail

vboot: Remove get_sw_write_protect_state callback

2017-07-18 23:24:01 +00:00

braswell

soc/intel/braswell: Fix SPI write after FLOCKDN is set

2017-08-07 20:03:02 +00:00

broadwell

usbdebug: Refactor early enable

2017-08-07 12:35:42 +00:00

cannonlake

soc/intel/cannonlake: Add proper support to enable UART2 in 16550 mode

2017-08-16 23:30:12 +00:00

common

soc/intel/common/block: Fix PMC common block dependency

2017-08-15 23:11:51 +00:00

fsp_baytrail

soc/intel: add IS_ENABLED() around Kconfig symbol references

2017-07-13 23:54:32 +00:00

fsp_broadwell_de

Rename __attribute__((packed)) --> __packed

2017-07-13 19:45:59 +00:00

quark

i2c: Move to Linux like struct i2c_msg

2017-08-14 18:07:30 +00:00

sch

Rename __attribute__((packed)) --> __packed

2017-07-13 19:45:59 +00:00

skylake

soc/intel/skylake: Add proper support to enable UART2 in 16550 mode

2017-08-16 23:29:56 +00:00