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https://github.com/Telecominfraproject/OpenCellular.git
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c7b11ca7b8
AP and EC UART now use the CCD V1 capabilities to determine when access is allowed. Transmit to AP and EC can be toggled independently from read access to output from those UARTs. Note that disabling read access disables both transmit and receive. That is, it's not possible to set a UART where transmit is allowed but receive isn't. Why would you want to do that, anyway? See go/cr50-ccd-wp for more information. BUG=b:62537474 BRANCH=cr50 TEST=manual with CR50_DEV=1 ccdoops ccdset cr50fullconsole always -> so we can use ccd command for testing ccd -> AP RX+TX, EC RX+TX ccdset uartecrx unlesslocked ccdset uartectx ifopened ccdset uartaprx always ccdset uartaptx unlesslocked ccdunlock ccd -> AP RX+TX, EC RX ccdlock ccd -> AP RX, EC disabled ccdoops ccdset cr50fullconsole always ccd -> AP RX+TX, EC RX+TX ccdset uartaprx ifopened ccdlock ccd -> AP disabled, EC RX Change-Id: I55db5897bb52cd60658ab221eadf5c59fc86744a Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/595196 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
122 lines
2.6 KiB
C
122 lines
2.6 KiB
C
/* Copyright 2016 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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#ifndef __CROS_EC_UARTN_H
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#define __CROS_EC_UARTN_H
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#include "common.h"
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/**
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* Initialize the UART module.
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*/
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void uartn_init(int uart);
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/**
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* Flush the transmit FIFO.
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*/
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void uartn_tx_flush(int uart);
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/**
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* Return non-zero if there is room to transmit a character immediately.
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*/
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int uartn_tx_ready(int uart);
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/**
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* Return non-zero if a transmit is in progress.
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*/
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int uartn_tx_in_progress(int uart);
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/*
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* Return non-zero if the UART has a character available to read.
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*/
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int uartn_rx_available(int uart);
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/**
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* Send a character to the UART data register.
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*
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* If the transmit FIFO is full, blocks until there is space.
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*
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* @param c Character to send.
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*/
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void uartn_write_char(int uart, char c);
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/**
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* Read one char from the UART data register.
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*
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* @return The character read.
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*/
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int uartn_read_char(int uart);
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/**
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* Disable all UART related IRQs.
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*
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* Used to avoid concurrent accesses on UART management variables.
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*/
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void uartn_disable_interrupt(int uart);
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/**
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* Re-enable UART IRQs.
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*/
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void uartn_enable_interrupt(int uart);
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/**
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* Re-enable the UART transmit interrupt.
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*
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* This also forces triggering a UART interrupt, if the transmit interrupt was
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* disabled.
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*/
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void uartn_tx_start(int uart);
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/**
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* Disable the UART transmit interrupt.
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*/
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void uartn_tx_stop(int uart);
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/**
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* Return non-zero if TX is connected for the UART.
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*
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* @param uart UART to check
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* @return 1 if TX pin is connected, 0 if disconnected.
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*/
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int uart_tx_is_connected(int uart);
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/* Connect TX pin for the UART */
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void uartn_tx_connect(int uart);
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/* Disconnect TX pin for the UART */
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void uartn_tx_disconnect(int uart);
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/**
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* Return non-zero if TX and RX are enabled for the UART.
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*
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* Note that TX won't be connected unless uart_tx_is_connected() is also
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* non-zero.
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*
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* @param uart UART to check
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* @return 1 if UART is enabled, 0 if disabled.
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*/
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int uartn_is_enabled(int uart);
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/**
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* Enable TX and RX for the UART. Disable HW flow control and loopback.
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*
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* @param uart UART to enable
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*
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* Note that this does NOT connect the TX pin for the UART; that must be done
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* explicitly via uartn_tx_connect().
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*/
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void uartn_enable(int uart);
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/**
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* Disable TX, RX, HW flow control, and loopback.
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*
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* @param uart UART to disable
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*
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* Note that this does NOT disconnect the TX pin for the UART; that must be
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* done explicitly via uartn_tx_disconnect().
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*/
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void uartn_disable(int uart);
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#endif /* __CROS_EC_UARTN_H */
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