Andrey Petrov 064a50160a cpu/x86/tsc: Compile TSC timer for postcar as well ...

Change-Id: I8fd79d438756aae03649e320d4d640cee284d88a
Signed-off-by: Andrey Petrov <andrey.petrov@intel.com>
Reviewed-on: https://review.coreboot.org/14298
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>

2016-04-11 17:56:57 +02:00

..

allwinner

src/: Fix lint style-labels warnings

2016-03-31 23:05:32 +02:00

amd

src/: Fix lint style-labels warnings

2016-03-31 23:05:32 +02:00

armltd

vboot2: add verstage

2015-01-27 01:41:40 +01:00

dmp

x86 chipsets: Link non-code flow CHIPSET_BOOTBLOCK_INCLUDE files

2015-12-30 18:34:08 +01:00

intel

northbridge/intel/i440bx: Unify UDELAY selection

2016-03-10 16:55:35 +01:00

qemu-power8

cpu/qemu-power8: don't enable it for qemu-x86

2016-02-19 20:03:52 +01:00

qemu-x86

qemu-x86: Enable SMP support

2015-12-08 15:54:27 +01:00

ti

am335x: Add some code for manipulating GPIOs

2016-04-10 18:18:07 +02:00

via

cpu/via/c7: Don't manually include udelay_io.c

2016-03-10 16:56:23 +01:00

x86

cpu/x86/tsc: Compile TSC timer for postcar as well

2016-04-11 17:56:57 +02:00

Kconfig

cpu: Add a way to use microcode .h files back to the build

2015-11-10 19:22:40 +01:00

Makefile.inc

cpu: Add a way to use microcode .h files back to the build

2015-11-10 19:22:40 +01:00