Andrey Petrov 4520c5e757 soc/intel/apollolake: Configure a GPIO for TPM in bootblock ...

One of devices connected to FAST SPI bus is TPM. SoC uses dedicated
line for chip select for TPM function. If TPM is used, that line needs
to be configured to a specific native funciton.

Change-Id: Ib5bf4c759adf9656f7b34540d4fc924945d27a97
Signed-off-by: Andrey Petrov <andrey.petrov@intel.com>
Reviewed-on: https://review.coreboot.org/14467
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

2016-04-28 05:11:23 +02:00

..

acpi

acpi/: add missing license header

2016-01-14 22:52:11 +01:00

arch

lib: add common write_tables() implementation

2016-04-21 20:49:05 +02:00

commonlib

ensure correct byte ordering for cbfs segment list

2016-04-25 23:30:00 +02:00

console

arch/x86: introduce postcar stage/phase

2016-03-23 14:24:30 +01:00

cpu

cpu/x86/tsc: Compile TSC timer for postcar as well

2016-04-11 17:56:57 +02:00

device

payloads: add iPXE 'payload' build

2016-04-13 17:45:37 +02:00

drivers

drivers/ricoh: Fully switch to src/drivers/[X]/[Y]/ scheme

2016-04-22 20:11:52 +02:00

ec

kbuild: Allow drivers to fit src/drivers/[X]/[Y]/ scheme

2016-04-19 18:34:18 +02:00

include

lib: add common write_tables() implementation

2016-04-21 20:49:05 +02:00

lib

ensure correct byte ordering for cbfs segment list

2016-04-25 23:30:00 +02:00

mainboard

soc/intel/apollolake: Configure a GPIO for TPM in bootblock

2016-04-28 05:11:23 +02:00

northbridge

nb/amd/mct_ddr3: Report correct DIMM in MRS setup routines

2016-04-26 16:54:04 +02:00

soc

soc/intel/apollolake: Configure a GPIO for TPM in bootblock

2016-04-28 05:11:23 +02:00

southbridge

intel/i82801ax: Fix IDE setup console log

2016-04-22 17:25:19 +02:00

superio

superio/smsc/mec1308: Fix AddressMax value for SMBX mailbox

2016-04-13 23:39:28 +02:00

vendorcode

AGESA vendorcode: Fix type mismatch

2016-04-21 07:39:13 +02:00

Kconfig

arch: use Kconfig variable for coreboot table size

2016-04-21 20:40:40 +02:00