Vadim Bendebury 459b7777fe add new LPC controller device ID value ...

This adds the PCI device id of the LPC controller identifying the
QPRJ/QS stepping of the Panther Point southbridge.

Change-Id: Idcaa7dbd30224e3690ea469c6cb74f75de287631
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: http://review.coreboot.org/968
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>

2012-05-01 20:03:31 +02:00

..

arch/x86

Move VSA support from x86 to Geode

2012-05-01 11:35:40 +02:00

boot

Make timestamp collection conditional in hardwaremain.c

2012-04-24 18:19:54 +02:00

console

Add support to run SMM handler in TSEG instead of ASEG

2012-04-04 04:49:09 +02:00

cpu

Move VSA support from x86 to Geode

2012-05-01 11:35:40 +02:00

devices

Allow device ID arrays in the PCI driver structure

2012-05-01 20:02:21 +02:00

drivers

Move top level pc80 directory to drivers/

2012-04-27 19:23:16 +02:00

ec

Add EC component for SMSC MEC1308/1310

2012-04-02 18:42:40 +02:00

include

Allow device ID arrays in the PCI driver structure

2012-05-01 20:02:21 +02:00

lib

S3 code in coreboot public folder.

2012-04-16 18:22:47 +02:00

mainboard

Clean up Emerald Lake 2 mainboard directory

2012-05-01 20:01:18 +02:00

northbridge

Fix Sandybridge/Ivybridge mainboards according to code review

2012-05-01 19:27:34 +02:00

southbridge

add new LPC controller device ID value

2012-05-01 20:03:31 +02:00

superio

SMSC MEC1308: Fix ACPI code to work with newer IASL versions

2012-04-27 19:23:58 +02:00

vendorcode

ChromeOS: add missing string.h in gnvs.c

2012-04-27 19:24:04 +02:00

Kconfig

Add Kconfig options to handle the blobs repository

2012-05-01 00:09:27 +02:00

Kconfig.deprecated_options

Unify ID_SECTION_OFFSET and mark it deprecated

2012-01-18 11:21:39 +01:00