Dino Li 1956a98ad4 it83xx: espi: Don't reset PNPCFG while PLTRST_L asserted ...

The PNPCFG (EC2I control module) is used to set I/O port base
address and IRQ number.
On it8320, PNPCFG will be reset while system event PLTRST_L
is asserted. This means we can't decode I/O cycles correctly
until we re-initialize PNPCFG.
We disable this reset source, then we don't need to re-initialize
PNPCFG for each PLTRST_L asserted.

BRANCH=none
BUG=none
TEST=MECC board with it8320 + Intel SKL-Y RVP3 and boot to shell.

Change-Id: I7efe8f726939245424237c1d153df4f83b39ae6b
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Reviewed-on: https://chromium-review.googlesource.com/810428
Reviewed-by: Randall Spangler <rspangler@chromium.org>

2017-12-06 23:22:18 -08:00

..

g

g:sps: do not stall reset when CS is asserted

2017-11-30 07:09:46 -08:00

host

Mark reset and panic functions as noreturn

2017-11-07 15:25:17 -08:00

ish

system: Allow hibernate to clear AP_OFF flag

2017-12-05 18:00:38 -08:00

it83xx

it83xx: espi: Don't reset PNPCFG while PLTRST_L asserted

2017-12-06 23:22:18 -08:00

lm4

host_events: Bump up host events and masks to 64-bit

2017-11-21 18:53:35 -08:00

mec1322

system: Allow hibernate to clear AP_OFF flag

2017-12-05 18:00:38 -08:00

npcx

system: Allow hibernate to clear AP_OFF flag

2017-12-05 18:00:38 -08:00

nrf51

cleanup: Remove jtag_pre_init()

2017-09-07 15:01:05 -07:00

stm32

chip/stm32/clock: Handle illegal alarm timeout gracefully

2017-12-06 17:30:47 -08:00