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42288543f9
Since the STM32 flash write protection was re-factored between STM32F0 and STM32F/F3, the common STM32 flash code checks whether the chip needs a reboot to synchronize its write protection state (as this can be done only with an OBL_LAUNCH triggered reset on STM32F0) but for platforms able to set immediatly the full write-protection (STM32F/STM32F3 with Cortex-M3 core using the bus fault interception code) where there is no EC_FLASH_PROTECT_ALL_AT_BOOT flag, this might trigger a reset loop in the RO code when the flash is write-protected. Make the check conditional to the existence of EC_FLASH_PROTECT_ALL_AT_BOOT. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=smaug BUG=chrome-os-partner:45288 TEST=On a smaug board with hardware write protect enable, enable software write protect from the AP command line: flashrom -p ec --wp-range 0 0x20000 flashrom -p ec --wp-enable ectool reboot_ec RO reboot -p then, go to fastboot mode : adb reboot-bootloader and see the machine booting properly. Change-Id: I93f78cb8e9e918c8efe374bd757b79bc87243e2c Reviewed-on: https://chromium-review.googlesource.com/299555 Trybot-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Commit-Queue: Vincent Palatin <vpalatin@chromium.org> (cherry picked from commit 39a0feb45b0c14ea5eb008329f2b8ea7a9b17c8a) Reviewed-on: https://chromium-review.googlesource.com/299762 Commit-Ready: Vincent Palatin <vpalatin@chromium.org>