Andrey Petrov 4ed99ad067 mainboard/reef: Add RW_VAR_MRC_CACHE ...

Chop off 4kb block from RW_MRC_CACHE to store variable MRC cache.

BUG=chrome-os-partner:57515
TEST=with patch series applied: cold reboot, make sure MRC is not
updated. Do S3 suspend/resume cycle.

Change-Id: I3e19fff9c9b20d6c73cbb13bfeec49e9a274bb72
Signed-off-by: Andrey Petrov <andrey.petrov@intel.com>
Reviewed-on: https://review.coreboot.org/17235
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

2016-11-30 16:45:53 +01:00

..

acpi

src/acpi: Capitalize ACPI and SATA

2016-07-31 19:25:40 +02:00

arch

Build system: Update HAVE_CMOS_DEFAULT

2016-11-28 18:58:15 +01:00

commonlib

commonlib/include: remove NEED_VB20_INTERNALS

2016-11-19 16:57:27 +01:00

console

Hook up libhwbase in ramstage

2016-11-29 23:45:40 +01:00

cpu

AGESA binaryPI: Fix cache-as-ram for x86_64

2016-11-25 10:32:07 +01:00

device

drivers/intel/gma: Hook up libgfxinit

2016-11-29 23:46:05 +01:00

drivers

driver/intel/fsp2_0: Add version parameter to FSP platform callback

2016-11-30 16:45:29 +01:00

ec

google/parrot: Fix keyboard interrupts, DSDT

2016-11-25 20:50:00 +01:00

include

x86 BIST: Fix missing include

2016-11-24 21:39:41 +01:00

lib

Hook up libhwbase in ramstage

2016-11-29 23:45:40 +01:00

mainboard

mainboard/reef: Add RW_VAR_MRC_CACHE

2016-11-30 16:45:53 +01:00

northbridge

intel/fsp_rangeley: Fix regression on MMCONF_SUPPORT

2016-11-30 14:40:38 +01:00

soc

driver/intel/fsp2_0: Add version parameter to FSP platform callback

2016-11-30 16:45:29 +01:00

southbridge

sb/intel/i3100/lpc.c: Use tab for indents

2016-11-28 01:06:33 +01:00

superio

sio/nuvoton: Include generic nuvoton driver in bootblock stage

2016-11-28 20:33:21 +01:00

vboot

commonlib/include: remove NEED_VB20_INTERNALS

2016-11-19 16:57:27 +01:00

vendorcode

vendorcode/intel: Update apollolake UPD headers to SIC 1.2.3 release

2016-11-30 16:44:53 +01:00

Kconfig

Hook up libhwbase in ramstage

2016-11-29 23:45:40 +01:00