OpenCellular

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Ionela Voinescu 51ad6ac695 pistachio: Decrease DDR ODT from 75R to 50R

The DDR On Die Termination was incorrectly configured at 75R,
where as the data sheet suggests for DDR2-800 it should be
set to 50R.

Correct this by adjusting the ODT setting in the EMR register.

BUG=chrome-os-partner:31438, chrome-os-partner:37087
TEST=tested on Pistachio bring up board -> DDR initialized
     properly and ramstage executed correctly
BRANCH=none

Change-Id: I2f0242c422b1cb3d1f64ce3dd17b62fef5e7e155
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: ac081ac59c0dc3d16a7b540cd379fb870b6cfe40
Original-Change-Id: If7951812033c4e88f4be3c143fb49526eddba142
Original-Signed-off-by: Ionela Voinescu <ionela.voinescu@imgtec.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/256304
Original-Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: http://review.coreboot.org/9846
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

2015-04-21 08:26:20 +02:00

arch

armv7: preserve bootblock invocation parameter

2015-04-21 08:24:39 +02:00

console

Add console wrapper for UART driver

2015-04-14 21:25:34 +02:00

cpu

arm(64): Globally replace writel(v, a) with write32(a, v)

2015-04-21 08:22:28 +02:00

device

Unify byte order macros and clrsetbits