Soby Mathew 663db206f8 Derive stack alignment from CACHE_WRITEBACK_GRANULE ...

The per-cpu stacks should be aligned to the cache-line size and
the `declare_stack` helper in asm_macros.S macro assumed a
cache-line size of 64 bytes. The platform defines the cache-line
size via CACHE_WRITEBACK_GRANULE macro. This patch modifies
`declare_stack` helper macro to derive stack alignment from the
platform defined macro.

Change-Id: I1e1b00fc8806ecc88190ed169f4c8d3dd25fe95b

2016-07-08 09:58:10 +01:00

..

tbbr

Replace all SCP FW (BL0, BL3-0) references

2015-12-14 12:31:16 +00:00

asm_macros.S

Derive stack alignment from CACHE_WRITEBACK_GRANULE

2016-07-08 09:58:10 +01:00

assert_macros.S

Add header guards to asm macro files

2015-04-27 18:06:24 +01:00

bl_common.h

Fix the inconsistencies in bl1_tbbr_image_descs[]

2016-02-22 18:17:34 +00:00

context_mgmt.h

Fix build error with optimizations disabled (-O0)

2016-04-14 16:24:03 +01:00

context.h

Build option to include AArch32 registers in cpu context

2016-06-03 10:50:52 +01:00

debug.h

Make cpu operations warning a VERBOSE print

2016-03-22 10:00:42 +00:00

el3_common_macros.S

Enable SCR_EL3.SIF bit

2016-04-07 16:30:45 +01:00

firmware_image_package.h

Replace all SCP FW (BL0, BL3-0) references

2015-12-14 12:31:16 +00:00

smcc_helpers.h

Move context management code to common location

2015-12-09 17:41:18 +00:00