Shawn Nematbakhsh 68bd2d4fb2 npcx: Use compatible MPU config ...

MPU is already configured for access restriction in cortex-m core code
so take care not to conflict.

BUG=chromium:782244
BRANCH=None
TEST=Build + boot on kevin, verify hibernate doesn't panic.

Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: I9903cbc69002529ebbfa3fc1be3de4f74264e4aa
Reviewed-on: https://chromium-review.googlesource.com/759157
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>

2017-11-14 10:11:19 -08:00

..

g

g: handle delayed processing of the 'wake' pulses

2017-11-08 03:12:23 -08:00

host

Mark reset and panic functions as noreturn

2017-11-07 15:25:17 -08:00

ish

host_event: Move host events and mask handling into common code

2017-10-17 23:14:19 -07:00

it83xx

it83xx: pwm: support PWM_CONFIG_DSLEEP config flag

2017-11-09 19:16:26 -08:00

lm4

port80: Provide default routine for logging port80 resume

2017-10-31 13:04:58 -07:00

mec1322

Mark reset and panic functions as noreturn

2017-11-07 15:25:17 -08:00

npcx

npcx: Use compatible MPU config

2017-11-14 10:11:19 -08:00

nrf51

cleanup: Remove jtag_pre_init()

2017-09-07 15:01:05 -07:00

stm32

chip/stm32/usart: Add flags to usart_config

2017-10-18 08:30:16 -07:00