Moritz Fischer 2e7a6bc39e stm32: jtag: Enable clock to debug module on stm32f0x ...

Enables the clock to the debug module so that when connecting via SWD
debugger the watchdog and timers are stopped.

BRANCH=master
TEST=Build on stm32f0x board and connect via SWD, observe no watchdog
reset.

Change-Id: Ic40b16c09acc5920da2c1a39e9391a6b21849d2c
Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
Reviewed-on: https://chromium-review.googlesource.com/765290
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>

2017-11-15 00:39:52 -08:00

..

g

g: handle delayed processing of the 'wake' pulses

2017-11-08 03:12:23 -08:00

host

Mark reset and panic functions as noreturn

2017-11-07 15:25:17 -08:00

ish

host_event: Move host events and mask handling into common code

2017-10-17 23:14:19 -07:00

it83xx

it83xx: add espi module

2017-11-14 21:52:39 -08:00

lm4

port80: Provide default routine for logging port80 resume

2017-10-31 13:04:58 -07:00

mec1322

Mark reset and panic functions as noreturn

2017-11-07 15:25:17 -08:00

npcx

npcx: Use compatible MPU config

2017-11-14 10:11:19 -08:00

nrf51

cleanup: Remove jtag_pre_init()

2017-09-07 15:01:05 -07:00

stm32

stm32: jtag: Enable clock to debug module on stm32f0x

2017-11-15 00:39:52 -08:00