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The application may need to read/write/erase the flash memory, but we not want console users to do so. This CL adds CONFIG_FLASH_PHYSICAL, which allows the higher-level CONFIG_FLASH to be undefined while still providing the chip-specific flash_physical_* accessor functions. There aren't many board.h files that needed changes, since CONFIG_FLASH_PHYSICAL is enabled by default, just like CONFIG_FLASH. BUG=chrome-os-partner:57408 BRANCH=none TEST=make buildall; try on Gru with and without CR50_DEV=1 See that it still boots, updates, wipes, restores, etc. without linking common/flash.o in the production image; and that the flash commands are still there in the dev build. Signed-off-by: Bill Richardson <wfrichar@chromium.org> Change-Id: I7eb1bbcb414b1c70ee427c4fcb5cea899dbb9e93 Reviewed-on: https://chromium-review.googlesource.com/391188 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
179 lines
4.8 KiB
C
179 lines
4.8 KiB
C
/* Copyright (c) 2013 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*
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* Main routine for Chrome EC
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*/
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#include "board_config.h"
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#include "clock.h"
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#include "common.h"
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#include "console.h"
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#include "cpu.h"
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#include "dma.h"
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#include "eeprom.h"
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#include "flash.h"
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#include "gpio.h"
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#include "hooks.h"
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#include "jtag.h"
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#include "keyboard_scan.h"
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#ifdef CONFIG_MPU
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#include "mpu.h"
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#endif
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#include "rsa.h"
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#include "system.h"
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#include "task.h"
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#include "timer.h"
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#include "uart.h"
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#include "util.h"
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#include "watchdog.h"
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/* Console output macros */
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#define CPUTS(outstr) cputs(CC_SYSTEM, outstr)
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#define CPRINTF(format, args...) cprintf(CC_SYSTEM, format, ## args)
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#define CPRINTS(format, args...) cprints(CC_SYSTEM, format, ## args)
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test_mockable __keep int main(void)
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{
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#ifdef CONFIG_REPLACE_LOADER_WITH_BSS_SLOW
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/*
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* Now that we have started execution, we no longer need the loader.
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* Instead, variables placed in the .bss.slow section will use this
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* space. Therefore, clear out this region now.
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*/
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memset((void *)(CONFIG_PROGRAM_MEMORY_BASE + CONFIG_LOADER_MEM_OFF), 0,
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CONFIG_LOADER_SIZE);
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#endif /* defined(CONFIG_REPLACE_LOADER_WITH_BSS_SLOW) */
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/*
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* Pre-initialization (pre-verified boot) stage. Initialization at
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* this level should do as little as possible, because verified boot
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* may need to jump to another image, which will repeat this
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* initialization. In particular, modules should NOT enable
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* interrupts.
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*/
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#ifdef CONFIG_BOARD_PRE_INIT
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board_config_pre_init();
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#endif
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#ifdef CONFIG_MPU
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mpu_pre_init();
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#endif
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/* Configure the pin multiplexers and GPIOs */
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jtag_pre_init();
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gpio_pre_init();
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#ifdef CONFIG_BOARD_POST_GPIO_INIT
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board_config_post_gpio_init();
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#endif
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/*
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* Initialize interrupts, but don't enable any of them. Note that
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* task scheduling is not enabled until task_start() below.
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*/
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task_pre_init();
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/*
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* Initialize the system module. This enables the hibernate clock
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* source we need to calibrate the internal oscillator.
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*/
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system_pre_init();
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system_common_pre_init();
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#if defined(CONFIG_FLASH_PHYSICAL)
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/*
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* Initialize flash and apply write protect if necessary. Requires
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* the reset flags calculated by system initialization.
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*/
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flash_pre_init();
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#endif
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#if defined(CONFIG_CASE_CLOSED_DEBUG) && defined(CONFIG_USB_POWER_DELIVERY)
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/*
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* If the device is locked we assert PD_NO_DEBUG, preventing the EC
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* from interfering with the AP's access to the SPI flash.
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* The PD_NO_DEBUG signal is latched in hardware, so changing this
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* GPIO later has no effect.
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*/
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gpio_set_level(GPIO_PD_DISABLE_DEBUG, system_is_locked());
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#endif
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/* Set the CPU clocks / PLLs. System is now running at full speed. */
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clock_init();
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/*
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* Initialize timer. Everything after this can be benchmarked.
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* get_time() and udelay() may now be used. usleep() requires task
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* scheduling, so cannot be used yet. Note that interrupts declared
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* via DECLARE_IRQ() call timer routines when profiling is enabled, so
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* timer init() must be before uart_init().
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*/
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timer_init();
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/* Main initialization stage. Modules may enable interrupts here. */
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cpu_init();
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#ifdef CONFIG_DMA
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/* Initialize DMA. Must be before UART. */
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dma_init();
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#endif
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/* Initialize UART. Console output functions may now be used. */
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uart_init();
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if (system_jumped_to_this_image()) {
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CPRINTS("UART initialized after sysjump");
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} else {
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CPUTS("\n\n--- UART initialized after reboot ---\n");
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CPUTS("[Reset cause: ");
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system_print_reset_flags();
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CPUTS("]\n");
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}
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CPRINTF("[Image: %s, %s]\n",
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system_get_image_copy_string(), system_get_build_info());
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#ifdef CONFIG_BRINGUP
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ccprintf("\n\nWARNING: BRINGUP BUILD\n\n\n");
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#endif
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#ifdef CONFIG_WATCHDOG
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/*
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* Intialize watchdog timer. All lengthy operations between now and
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* task_start() must periodically call watchdog_reload() to avoid
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* triggering a watchdog reboot. (This pretty much applies only to
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* verified boot, because all *other* lengthy operations should be done
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* by tasks.)
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*/
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watchdog_init();
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#endif
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/*
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* Verified boot needs to read the initial keyboard state and EEPROM
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* contents. EEPROM must be up first, so keyboard_scan can toggle
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* debugging settings via keys held at boot.
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*/
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#ifdef CONFIG_EEPROM
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eeprom_init();
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#endif
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#ifdef HAS_TASK_KEYSCAN
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keyboard_scan_init();
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#endif
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#ifdef CONFIG_RWSIG
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/*
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* Check the RW firmware signature
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* and eventually jump to it if it is good.
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*/
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check_rw_signature();
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#endif
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/*
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* Print the init time. Not completely accurate because it can't take
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* into account the time before timer_init(), but it'll at least catch
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* the majority of the time.
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*/
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CPRINTS("Inits done");
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/* Launch task scheduling (never returns) */
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return task_start();
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}
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