Marshall Dawson 7681481f65 google/kahlee: Select HAVE_ACPI_RESUME ...

TEST=Run powerd_dbus_suspend and resume with button press
BUG=b:69614064

Change-Id: I0a5a610590b599b96dd0def211c4aa31c7a538ea
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/22732
Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

2018-02-12 19:10:28 +00:00

..

acpi

arch/x86: Add common AMD ACPI hardware definitions

2017-11-10 19:15:38 +00:00

arch

arm64: Pass COREBOOT flag to ARM TF, always enable logging

2018-02-02 22:19:37 +00:00

commonlib

lib/stage_cache: Add save/get raw storage

2018-02-07 16:22:40 +00:00

console

console: Ignore loglevel in nvram until ramstage

2017-09-25 13:35:29 +00:00

cpu

cpu/intel/haswell: Don't select PARALLEL_CPU_INIT

2018-02-06 15:30:06 +00:00

device

Add a default path for vbt.bin

2018-02-01 18:57:28 +00:00

drivers

drivers/adau7002: Add driver for handling ADAU7002

2018-02-10 23:56:32 +00:00

ec

ec/chromeec: Fix battery ACPI mutex level

2018-02-12 15:56:55 +00:00

include

lib/stage_cache: Add save/get raw storage

2018-02-07 16:22:40 +00:00

lib

lib/stage_cache: Add save/get raw storage

2018-02-07 16:22:40 +00:00

mainboard

google/kahlee: Select HAVE_ACPI_RESUME

2018-02-12 19:10:28 +00:00

northbridge

nb/intel/sandybridge: Always use the same MMCONF_BASE_ADDRESS

2018-02-06 22:40:06 +00:00

security

security/vboot: overwrite existing spaces during factory init for tpm2

2018-02-07 02:37:25 +00:00

soc

amd/stoneyridge: Add S3 support to POST

2018-02-12 17:02:37 +00:00

southbridge

drivers/spi: support cmd opcode deduction for spi_crop_chunk()

2018-01-30 05:37:47 +00:00

superio

Intel i3100 boards & chips: Remove - using LATE_CBMEM_INIT

2018-01-15 23:25:12 +00:00

vendorcode

vc/amd/00670F00: Introduce S3FinalRestore helper

2018-02-12 17:00:46 +00:00

Kconfig

util/blobtool: rename to bincfg

2018-01-18 13:47:20 +00:00