Rong Chang 776374b028 Wait STM I2C stop bit sent ...

This CL prevents the risk of CR1 write access causes duplicate STOP.

Signed-off-by: Rong Chang <rongchang@chromium.org>
BUG=chrome-os-partner:11974
TEST=manual
  console command "pmu 200"

Change-Id: I717336d87230139a1a17e6f39e70502c0e0c7a18
(cherry picked from https://gerrit.chromium.org/gerrit/#/c/26832)
Reviewed-on: https://gerrit.chromium.org/gerrit/28811
Commit-Ready: Rong Chang <rongchang@chromium.org>
Tested-by: Rong Chang <rongchang@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>

2012-07-31 22:13:50 -07:00

..

lm4

Fix setting initial debounced power button state

2012-07-31 16:07:27 -07:00

stm32

Wait STM I2C stop bit sent

2012-07-31 22:13:50 -07:00