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https://github.com/Telecominfraproject/OpenCellular.git
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94f5413159
Accelerometer reports accelerating in mg. Fix gain to that full range (2g, 4g or 8g) returns 2<<15. BUG=b:73546254 BRANCH=master TEST=compile Change-Id: I2873a641985fa800709a2d30b031c2b6e3fcb39e Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/924407 Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
140 lines
3.6 KiB
C
140 lines
3.6 KiB
C
/* Copyright 2016 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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/* LIS2DH accelerometer module for Chrome EC */
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#ifndef __CROS_EC_ACCEL_LIS2DH_H
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#define __CROS_EC_ACCEL_LIS2DH_H
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#define LIS2DH_I2C_ADDR(__x) (__x << 1)
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/* 7-bit address is 000110Xb. Where 'X' is determined
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* by the voltage on the ADDR pin
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*/
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#define LIS2DH_ADDR0 LIS2DH_I2C_ADDR(0x18)
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#define LIS2DH_ADDR1 LIS2DH_I2C_ADDR(0x19)
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/* Who Am I */
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#define LIS2DH_WHO_AM_I_REG 0x0f
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#define LIS2DH_WHO_AM_I 0x33
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/* COMMON DEFINE FOR ACCEL SENSOR */
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#define LIS2DH_EN_BIT 0x01
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#define LIS2DH_DIS_BIT 0x00
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#define LIS2DH_INT2_ON_INT1_ADDR 0x13
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#define LIS2DH_INT2_ON_INT1_MASK 0x20
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#define LIS2DH_OUT_X_L_ADDR 0x28
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#define LIS2DH_CTRL1_ADDR 0x20
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#define LIS2DH_INT2_ON_INT1_MASK 0x20
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#define LIS2DH_ENABLE_ALL_AXES 0x07
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#define LIS2DH_CTRL2_ADDR 0x21
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#define LIS2DH_CTRL2_RESET_VAL 0x00
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#define LIS2DH_CTRL3_ADDR 0x22
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#define LIS2DH_CTRL3_RESET_VAL 0x00
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#define LIS2DH_CTRL4_ADDR 0x23
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#define LIS2DH_BDU_MASK 0x80
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#define LIS2DH_CTRL5_ADDR 0x24
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#define LIS2DH_CTRL5_RESET_VAL 0x00
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#define LIS2DH_CTRL6_ADDR 0x25
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#define LIS2DH_CTRL6_RESET_VAL 0x00
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#define LIS2DH_STATUS_REG 0x27
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#define LIS2DH_STS_XLDA_UP 0x80
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#ifdef CONFIG_ACCEL_FIFO
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/* FIFO regs, masks and define */
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#define LIS2DH_FIFO_WTM_INT_MASK 0x04
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#define LIS2DH_FIFO_CTRL_REG 0x2e
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#define LIS2DH_FIFO_MODE_MASK 0xc0
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#define LIS2DH_FIFO_THR_MASK 0x1f
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/* Select FIFO supported mode:
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* BYPASS - Bypass FIFO
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* FIFO - FIFO mode collect data
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* STREAM - FIFO older data is replaced by new data
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* SFIFO - Stream-to-FIFO mode. Mix FIFO & STREAM
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*/
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enum lis2dh_fifo_modes {
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LIS2DH_FIFO_BYPASS_MODE = 0x00,
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LIS2DH_FIFO_MODE,
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LIS2DH_FIFO_STREAM_MODE,
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LIS2DH_FIFO_SFIFO_MODE
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};
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/* Defines for LIS2DH_CTRL5_ADDR FIFO register */
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#define LIS2DH_FIFO_EN_MASK 0x40
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#define LIS2DH_FIFO_SRC_REG 0x2f
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#define LIS2DH_FIFO_EMPTY_FLAG 0x20
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#define LIS2DH_FIFO_UNREAD_MASK 0x1f
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#endif /* CONFIG_ACCEL_FIFO */
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/* Interrupt source status register */
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#define LIS2DH_INT1_SRC_REG 0x31
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/* Output data rate Mask register */
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#define LIS2DH_ACC_ODR_MASK 0xf0
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/* Acc data rate */
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enum lis2dh_odr {
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LIS2DH_ODR_0HZ_VAL = 0,
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LIS2DH_ODR_1HZ_VAL,
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LIS2DH_ODR_10HZ_VAL,
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LIS2DH_ODR_25HZ_VAL,
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LIS2DH_ODR_50HZ_VAL,
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LIS2DH_ODR_100HZ_VAL,
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LIS2DH_ODR_200HZ_VAL,
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LIS2DH_ODR_400HZ_VAL,
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LIS2DH_ODR_LIST_NUM
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};
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/* Absolute maximum rate for sensor */
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#define LIS2DH_ODR_MIN_VAL 1000
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#define LIS2DH_ODR_MAX_VAL 400000
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/* Return ODR reg value based on data rate set */
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#define LIS2DH_ODR_TO_REG(_odr) \
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(_odr <= 1000) ? LIS2DH_ODR_1HZ_VAL : \
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(_odr <= 10000) ? LIS2DH_ODR_10HZ_VAL : \
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((31 - __builtin_clz(_odr / 25000))) + 3
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/* Return ODR real value normalized to sensor capabilities */
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#define LIS2DH_ODR_TO_NORMALIZE(_odr) \
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(_odr <= 1000) ? 1000 : (_odr <= 10000) ? 10000 : \
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(25000 * (1 << (31 - __builtin_clz(_odr / 25000))))
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/* Return ODR real value normalized to sensor capabilities from reg value */
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#define LIS2DH_REG_TO_NORMALIZE(_reg) \
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(_reg == LIS2DH_ODR_1HZ_VAL) ? 1000 : \
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(_reg == LIS2DH_ODR_10HZ_VAL) ? 10000 : (25000 * (1 << (_reg - 3)))
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/* Full scale range Mask register */
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#define LIS2DH_FS_MASK 0x30
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/* FS reg value from Full Scale */
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#define LIS2DH_FS_TO_REG(_fs) (__fls(_fs) - 1)
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/* Sensor resolution in number of bits
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* This sensor has variable precision (8/10/12 bits) depending Power Mode
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* selected
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* TODO: Only Normal Power mode supported (10 bits)
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*/
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#define LIS2DH_RESOLUTION 10
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extern const struct accelgyro_drv lis2dh_drv;
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void lis2dh_interrupt(enum gpio_signal signal);
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#endif /* __CROS_EC_ACCEL_LIS2DH_H */
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