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No functional changes; just code cleanup. On LM4 this also #ifdef's out the 'sleep' and 'pll' commands since they're big and we don't use them. BUG=chrome-os-partner:15579 BRANCH=none TEST=boot system Change-Id: I1b72d07d6cca2c783d7ac4c880119df3e88e356e Signed-off-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/36799
57 lines
1.4 KiB
C
57 lines
1.4 KiB
C
/* Copyright (c) 2012 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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/* Clocks and power management settings */
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#ifndef __CROS_EC_CLOCK_H
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#define __CROS_EC_CLOCK_H
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#include "common.h"
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/**
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* Set the CPU clocks and PLLs.
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*/
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void clock_init(void);
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/**
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* Return the current clock frequency in Hz.
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*/
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int clock_get_freq(void);
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/**
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* Enable or disable the PLL.
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*
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* @param enable Enable PLL if non-zero; disable if zero.
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* @param notify Notify other modules of the PLL change. This should
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* be 1 unless you're briefly turning on the PLL to work
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* around a chip errata at init time.
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*/
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void clock_enable_pll(int enable, int notify);
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/**
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* Wait for a number of clock cycles.
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*
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* Simple busy waiting for use before clocks/timers are initialized.
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*
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* @param cycles Number of cycles to wait.
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*/
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void clock_wait_cycles(uint32_t cycles);
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/* Low power modes for idle API */
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enum {
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SLEEP_MASK_AP_RUN = (1 << 0), /* the main CPU is running */
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SLEEP_MASK_UART = (1 << 1), /* UART communication on-going */
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SLEEP_MASK_I2C = (1 << 2), /* I2C master communication on-going */
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SLEEP_MASK_CHARGING = (1 << 3), /* Charging loop on-going */
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SLEEP_MASK_FORCE = (1 << 31), /* Force disabling low power modes */
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};
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void enable_sleep(uint32_t mask);
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void disable_sleep(uint32_t mask);
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#endif /* __CROS_EC_CLOCK_H */
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