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Try to ensure the SPI host protocol byte codes (aka EC_SPI_xxx) are transmitted and at the right time despite the errata and other brokenness of the SPI HW controller in the STM32H7 rev Y silicon. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=poppy BUG=b:73947203 TEST=on Meowth, run: 'while true; do ectool --name=cros_fp version || break ; done' same thing with 'fpinfo', 'fptemplate', 'fpframe'. Change-Id: Ia455dc0d4b2803a150122655460ef5c11afcda6c Reviewed-on: https://chromium-review.googlesource.com/1012202 Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>