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https://github.com/Telecominfraproject/OpenCellular.git
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748154d55f
Preventing instruction fetch from RAM for Link except iram.text, which is used for hibernation. Stm32 on Snow does not support MPU. Tested on Link using commands 'crash nxtext/nxdata/nxstack', which run code from .iram.text, .data section, and the stack, respectively: ... RAM locked. Exclusion 20005980-200059a0 ... > crash nxtext Running from 20005984 > crash nxdata === PROCESS EXCEPTION: 04 ====== xPSR: 61000000 === r0 :00000000 r1 :0000dff2 r2 :00000005 r3 :0000086d r4 :00000000 r5 :00000032 r6 :2000544c r7 :00000000 r8 :00000000 r9 :20005456 r10:00000000 r11:00000000 r12:20005961 sp :20002748 lr :000008d7 pc :20005960 Instruction access violation mmfs = 1, shcsr = 70001, hfsr = 0, dfsr = 0 =========== Process Stack Contents =========== 200027b0: 0000086d 00000002 0000d504 00009f27 200027c0: 2000544c 20005452 00000000 00000000 200027d0: 00000000 00000000 00000000 00000000 200027e0: 00000000 00000000 00000000 00000cbb Rebooting... > crash nxstack === PROCESS EXCEPTION: 04 ====== xPSR: 20000200 === r0 :00000070 r1 :00000047 r2 :00000000 r3 :200027a8 r4 :00000000 r5 :00000001 r6 :2000544c r7 :00000000 r8 :00000000 r9 :20005456 r10:00000000 r11:00000000 r12:00000002 sp :20002740 lr :00000913 pc :200027ac Instruction access violation mmfs = 1, shcsr = 70001, hfsr = 0, dfsr = 0 =========== Process Stack Contents =========== 200027ac: 00000070 00000047 00000002 0000d57c 200027bc: 00009f9f 2000544c 20005452 00000000 200027cc: 00000000 00000000 00000000 00000000 200027dc: 00000000 00000000 00000000 00000000 Rebooting... BUG=chrome-os-partner:16904 BRANCH=master TEST=stated above Change-Id: I7c6593c527f29609442f33550f9d16755f32297c Signed-off-by: Daisuke Nojiri <dnojiri@google.com> Reviewed-on: https://chromium-review.googlesource.com/51337 Reviewed-by: Randall Spangler <rspangler@chromium.org>
122 lines
2.7 KiB
C
122 lines
2.7 KiB
C
/* Copyright (c) 2013 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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/* MPU module for Chrome EC */
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#include "mpu.h"
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#include "console.h"
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#include "registers.h"
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#include "task.h"
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#include "util.h"
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/**
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* Update a memory region.
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*
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* region: number of the region to update
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* addr: base address of the region
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* size_bit: size of the region in power of two.
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* attr: attribute of the region. Current value will be overwritten if enable
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* is set.
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* enable: enables the region if non zero. Otherwise, disables the region.
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*
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* Based on 3.1.4.1 'Updating an MPU Region' of Stellaris LM4F232H5QC Datasheet
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*/
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static void mpu_update_region(uint8_t region, uint32_t addr, uint8_t size_bit,
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uint16_t attr, uint8_t enable)
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{
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asm volatile("isb; dsb;");
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MPU_NUMBER = region;
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MPU_SIZE &= ~1; /* Disable */
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if (enable) {
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MPU_BASE = addr;
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MPU_ATTR = attr;
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MPU_SIZE = (size_bit - 1) << 1 | 1; /* Enable */
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}
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asm volatile("isb; dsb;");
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}
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int mpu_config_region(uint8_t region, uint32_t addr, uint32_t size,
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uint16_t attr, uint8_t enable)
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{
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int size_bit = 0;
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if (!size)
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return -EC_ERROR_INVAL;
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while (!(size & 1)) {
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size_bit++;
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size >>= 1;
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}
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/* Region size must be a power of 2 (size == 0) and equal or larger than
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* 32 (size_bit >= 5) */
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if (size > 1 || size_bit < 5)
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return -EC_ERROR_INVAL;
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mpu_update_region(region, addr, size_bit, attr, enable);
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return EC_SUCCESS;
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}
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int mpu_nx_region(uint8_t region, uint32_t addr, uint32_t size)
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{
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return mpu_config_region(
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region, addr, size,
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MPU_ATTR_NX | MPU_ATTR_FULLACCESS | MPU_ATTR_INTERNALSRAM, 1);
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}
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void mpu_enable(void)
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{
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MPU_CTRL |= MPU_CTRL_PRIVDEFEN | MPU_CTRL_HFNMIENA | MPU_CTRL_ENABLE;
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}
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void mpu_disable(void)
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{
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MPU_CTRL &= ~(MPU_CTRL_PRIVDEFEN | MPU_CTRL_HFNMIENA | MPU_CTRL_ENABLE);
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}
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uint32_t mpu_get_type(void)
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{
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return MPU_TYPE;
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}
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/**
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* Prevent code from running on RAM.
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* We need to allow execution from iram.text. Using higher region# allows us to
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* do 'whitelisting' (lock down all then create exceptions).
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*/
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int mpu_protect_ram(void)
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{
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int ret;
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ret = mpu_nx_region(0, CONFIG_RAM_BASE, CONFIG_RAM_SIZE);
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if (ret != EC_SUCCESS)
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return ret;
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ret = mpu_config_region(
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7, (uint32_t)&__iram_text_start,
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(uint32_t)(&__iram_text_end - &__iram_text_start),
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MPU_ATTR_FULLACCESS | MPU_ATTR_INTERNALSRAM, 1);
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return ret;
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}
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int mpu_pre_init(void)
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{
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int i;
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if (mpu_get_type() != 0x00000800)
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return EC_ERROR_UNIMPLEMENTED;
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mpu_disable();
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for (i = 0; i < 8; ++i) {
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mpu_config_region(
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i, CONFIG_RAM_BASE, CONFIG_RAM_SIZE,
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MPU_ATTR_FULLACCESS | MPU_ATTR_INTERNALSRAM, 0);
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}
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return EC_SUCCESS;
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}
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