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On stm32f412, AHB prescaler must be 1 in order for stm32f412 to be clocked at greater than 50MHz. APBX prescaler must be 2 so the clocks can be in the right range. When APBX prescaler != 1, it results in 2x timer clocks on both APB1 and APB2. We added a new clock_get_timer_freq() function for stm32 to get timer specific clock frequency so we can return 2x timer clocks when APBX != 1. Flash latencies also need to be changed when we clock at 96MHz, the FLASH_ACR_LATENCY defines are moved into the variant-specific switches so each board can defined latency when setting CPU clocks. BUG=b:38077127 TEST=`make BOARD=rose -j`, touch performance improved by 2x. Change-Id: Ieb211ad80c168d3f57e72a8d16b954b703ee1444 Reviewed-on: https://chromium-review.googlesource.com/539375 Commit-Ready: Wei-Ning Huang <wnhuang@chromium.org> Tested-by: Wei-Ning Huang <wnhuang@chromium.org> Reviewed-by: Rong Chang <rongchang@chromium.org>