Aaron Durbin 82d0f91420 soc/intel/apollolake: enable exception handling in every stage for glk ...

Now that an idt is available in every stage utilize it for exception
processing to help catch and debug issues.

BUG=b:72728953

Change-Id: I69e7f938f36f2e522b787e311fd148bb8fd41247
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/25764
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

2018-04-26 15:19:07 +00:00

..

acpi

arch/x86: Add common AMD ACPI hardware definitions

2017-11-10 19:15:38 +00:00

arch

arch/x86: remove nop padding from exception vectors

2018-04-26 15:18:57 +00:00

commonlib

compiler.h: add __weak macro

2018-04-24 14:37:59 +00:00

console

compiler.h: add __weak macro

2018-04-24 14:37:59 +00:00

cpu

cpu/x86: add limited runtime identity page mapping

2018-04-26 06:55:59 +00:00

device

compiler.h: add __weak macro

2018-04-24 14:37:59 +00:00

drivers

drivers/i2c/ck505: Remove unneeded headers

2018-04-26 11:59:28 +00:00

ec

compiler.h: add __weak macro

2018-04-24 14:37:59 +00:00

include

arch/x86: print cr2 value on every exception

2018-04-26 15:18:41 +00:00

lib

lib/ext_stage_cache: include prog arg in stage cache metadata

2018-04-24 14:39:36 +00:00

mainboard

mb/sifive: Add HiFive Unleashed mainboard

2018-04-26 11:52:41 +00:00

northbridge

vx900: Drop some unused defines

2018-04-25 11:43:04 +00:00

security

compiler.h: add __weak macro

2018-04-24 14:37:59 +00:00

soc

soc/intel/apollolake: enable exception handling in every stage for glk

2018-04-26 15:19:07 +00:00

southbridge

compiler.h: add __weak macro

2018-04-24 14:37:59 +00:00

superio

Intel i3100 boards & chips: Remove - using LATE_CBMEM_INIT

2018-01-15 23:25:12 +00:00

vendorcode

vendorcode/amd/pi/00670F00: Remove include header

2018-04-25 14:09:48 +00:00

Kconfig

Timestamps: Add option to print timestamps to debug console

2018-03-09 17:16:21 +00:00