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https://github.com/Telecominfraproject/OpenCellular.git
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957638c78c
Add npcx_evb_arm board-level driver for arm-based platform. Add header.c: for booting from NPCX5M5G A3 Booter. Remove lfw folder due to those functionalitie have been replaced with Booter Modified drivers for Patch Set 1: 1. flash.c: Implement UMA lock, tri-state and selection register lock functionalities 2. hwtimer.c: Add ITIM32 for hwtimer 3. lpc.c: Add checking for LRESET 4. system.c: Modified CODERAM_ARCH functions for NPCX5M5G A3 Booter. 5. uart.c: Add support for module 2 Patch Set 2: 6. lpc.c: Modified lpc_get_pltrst_asserted() func Patch Set 3: 7. minimize the changes for CONFIG_CODERAM_ARCH in common layer 8. comments of Patch Set1/2 Patch Set 4: 9. Modified CONFIG_RO_MEM_OFF point to ro image and keep header as a part of ec.RO.flat. 10. Fixed RO_FRID and RW_FRID issues which caused by CONFIG_CODERAM_ARCH. Patch Set 5: 11. Modified system.c in common folder for supporting *_STORAGE_OFF. 12. Use *_STORAGE_OFF in firmware_image.lds.S to indicate flat file layout in flash. Patch Set 6: 13. rebase to newest version 14. system.c: Modified for the newest include/system.h Patch Set 7: 15. Merge from version 0625 BUG=chrome-os-partner:34346 TEST=make buildall -j; test nuvoton IC specific drivers BRANCH=none Change-Id: Ifd7c10b81b5781ccd75bb2558dc236486976e8ed Signed-off-by: Ian Chao <mlchao@nuvoton.com> Reviewed-on: https://chromium-review.googlesource.com/272034 Reviewed-by: Shawn N <shawnn@chromium.org> Tested-by: Shawn N <shawnn@chromium.org> Commit-Queue: Shawn N <shawnn@chromium.org>
321 lines
8.6 KiB
ArmAsm
321 lines
8.6 KiB
ArmAsm
/* Copyright (c) 2013 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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#include "config.h"
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#include "rsa.h"
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#define FW_MEM_OFF_(section) CONFIG_##section##_MEM_OFF
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#define FW_MEM_OFF(section) (FW_MEM_OFF_(section))
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#define FW_OFF(section) (CONFIG_FLASH_BASE + FW_MEM_OFF(section))
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#define FW_SIZE_(section) CONFIG_##section##_SIZE
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#define FW_SIZE(section) FW_SIZE_(section)
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OUTPUT_FORMAT(BFD_FORMAT, BFD_FORMAT, BFD_FORMAT)
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OUTPUT_ARCH(BFD_ARCH)
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ENTRY(reset)
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MEMORY
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{
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#if defined(SECTION_IS_RO) && defined(NPCX_RO_HEADER)
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/*
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* Header structure used by npcx booter in RO region.
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* Please notice the location of header must be in front of FW
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* which needs copy. But header itself won't be copied to code ram
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* by booter.
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*/
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FLASH_HDR (rx) : ORIGIN = FW_OFF(RO_HDR), LENGTH = FW_SIZE(RO_HDR)
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#endif
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FLASH (rx) : ORIGIN = FW_OFF(SECTION), LENGTH = FW_SIZE(SECTION)
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IRAM (rw) : ORIGIN = CONFIG_RAM_BASE, LENGTH = CONFIG_RAM_SIZE
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#ifdef CONFIG_CODERAM_ARCH
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#ifdef CONFIG_FLASH_MAPPED
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/* Geometry constants have non-standard meaning for npcx */
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CDRAM (rx) : \
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ORIGIN = CONFIG_CDRAM_BASE, \
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LENGTH = CONFIG_CDRAM_SIZE
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#else /* CONFIG_FLASH_MAPPED */
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CDRAM (rx) : \
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ORIGIN = CONFIG_CDRAM_BASE + FW_MEM_OFF(SECTION), \
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LENGTH = FW_SIZE(SECTION)
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#endif /* CONFIG_FLASH_MAPPED */
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#endif /* CONFIG_CODERAM_ARCH */
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#ifdef RSA_PUBLIC_KEY_SIZE
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PSTATE(r) : \
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ORIGIN = FW_OFF(SECTION) + FW_SIZE(SECTION), \
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LENGTH = CONFIG_FW_PSTATE_SIZE
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#endif
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#ifdef CONFIG_USB_RAM_SIZE
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USB_RAM (rw) : \
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ORIGIN = CONFIG_USB_RAM_BASE, \
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LENGTH = CONFIG_USB_RAM_SIZE * CONFIG_USB_RAM_ACCESS_SIZE / 2
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#endif
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}
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SECTIONS
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{
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#if defined(SECTION_IS_RO) && defined(NPCX_RO_HEADER)
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.header : {
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KEEP(*(.header))
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} > FLASH_HDR
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#endif
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.text : {
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OUTDIR/core/CORE/init.o (.text.vecttable)
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. = ALIGN(4);
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__version_struct_offset = .;
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KEEP(*(.rodata.ver))
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. = ALIGN(4);
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KEEP(*(.rodata.pstate))
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#ifdef SHIFT_CODE_FOR_TEST
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. = ALIGN(256);
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#else
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. = ALIGN(4);
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#endif
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OUTDIR/core/CORE/init.o (.text)
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*(.text*)
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#ifdef CONFIG_CODERAM_ARCH
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__flash_lpfw_start = .;
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/* Entering deep idle FW for better power consumption */
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KEEP(*(.lowpower_ram))
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__flash_lpfw_end = .;
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} > CDRAM AT > FLASH
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#else
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#ifdef COMPILE_FOR_RAM
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} > IRAM
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#else
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} > FLASH
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#endif
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#endif
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. = ALIGN(4);
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.rodata : {
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/* Symbols defined here are declared in link_defs.h */
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__irqprio = .;
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KEEP(*(.rodata.irqprio))
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__irqprio_end = .;
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. = ALIGN(4);
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__cmds = .;
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KEEP(*(SORT(.rodata.cmds*)))
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__cmds_end = .;
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. = ALIGN(4);
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__hcmds = .;
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KEEP(*(.rodata.hcmds))
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__hcmds_end = .;
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. = ALIGN(4);
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__mkbp_evt_srcs = .;
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KEEP(*(.rodata.evtsrcs))
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__mkbp_evt_srcs_end = .;
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. = ALIGN(4);
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__hooks_init = .;
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KEEP(*(.rodata.HOOK_INIT))
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__hooks_init_end = .;
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__hooks_pre_freq_change = .;
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KEEP(*(.rodata.HOOK_PRE_FREQ_CHANGE))
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__hooks_pre_freq_change_end = .;
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__hooks_freq_change = .;
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KEEP(*(.rodata.HOOK_FREQ_CHANGE))
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__hooks_freq_change_end = .;
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__hooks_sysjump = .;
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KEEP(*(.rodata.HOOK_SYSJUMP))
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__hooks_sysjump_end = .;
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__hooks_chipset_pre_init = .;
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KEEP(*(.rodata.HOOK_CHIPSET_PRE_INIT))
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__hooks_chipset_pre_init_end = .;
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__hooks_chipset_startup = .;
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KEEP(*(.rodata.HOOK_CHIPSET_STARTUP))
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__hooks_chipset_startup_end = .;
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__hooks_chipset_resume = .;
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KEEP(*(.rodata.HOOK_CHIPSET_RESUME))
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__hooks_chipset_resume_end = .;
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__hooks_chipset_suspend = .;
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KEEP(*(.rodata.HOOK_CHIPSET_SUSPEND))
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__hooks_chipset_suspend_end = .;
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__hooks_chipset_shutdown = .;
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KEEP(*(.rodata.HOOK_CHIPSET_SHUTDOWN))
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__hooks_chipset_shutdown_end = .;
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__hooks_ac_change = .;
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KEEP(*(.rodata.HOOK_AC_CHANGE))
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__hooks_ac_change_end = .;
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__hooks_lid_change = .;
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KEEP(*(.rodata.HOOK_LID_CHANGE))
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__hooks_lid_change_end = .;
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__hooks_pwrbtn_change = .;
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KEEP(*(.rodata.HOOK_POWER_BUTTON_CHANGE))
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__hooks_pwrbtn_change_end = .;
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__hooks_charge_state_change = .;
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KEEP(*(.rodata.HOOK_CHARGE_STATE_CHANGE))
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__hooks_charge_state_change_end = .;
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__hooks_battery_soc_change = .;
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KEEP(*(.rodata.HOOK_BATTERY_SOC_CHANGE))
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__hooks_battery_soc_change_end = .;
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__hooks_tick = .;
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KEEP(*(.rodata.HOOK_TICK))
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__hooks_tick_end = .;
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__hooks_second = .;
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KEEP(*(.rodata.HOOK_SECOND))
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__hooks_second_end = .;
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__deferred_funcs = .;
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KEEP(*(.rodata.deferred))
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__deferred_funcs_end = .;
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__usb_desc = .;
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KEEP(*(.rodata.usb_desc_conf))
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KEEP(*(SORT(.rodata.usb_desc*)))
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__usb_desc_end = .;
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. = ALIGN(4);
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KEEP(*(.rodata.usb_ep))
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. = ALIGN(4);
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*(.rodata*)
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#if defined(SECTION_IS_RO) && defined(CONFIG_FLASH)
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. = ALIGN(64);
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KEEP(*(.google))
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#endif
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. = ALIGN(4);
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#ifdef CONFIG_CODERAM_ARCH
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} > CDRAM AT > FLASH
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#else
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#ifdef COMPILE_FOR_RAM
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} > IRAM
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#else
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} > FLASH
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#endif
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#endif
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__ro_end = . ;
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__deferred_funcs_count =
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(__deferred_funcs_end - __deferred_funcs) / 4;
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ASSERT(__deferred_funcs_count <= DEFERRABLE_MAX_COUNT,
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"Increase DEFERRABLE_MAX_COUNT")
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.bss : {
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/*
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* Align to 512 bytes. This is convenient when some memory block
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* need big alignment. When COMPILE_FOR_RAM is not set, this is the
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* beginning of the RAM, so there is usually no penalty on aligning
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* this.
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*/
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. = ALIGN(512);
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__bss_start = .;
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*(.bss.big_align)
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/* Stacks must be 64-bit aligned */
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. = ALIGN(8);
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*(.bss.system_stack)
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/* Rest of .bss takes care of its own alignment */
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*(.bss)
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. = ALIGN(4);
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__bss_end = .;
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} > IRAM
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#ifdef COMPILE_FOR_RAM
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.data : {
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#else
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#ifdef CONFIG_CODERAM_ARCH
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.data : AT(LOADADDR(.rodata) + SIZEOF(.rodata)) {
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#else
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.data : AT(ADDR(.rodata) + SIZEOF(.rodata)) {
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#endif
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#endif
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. = ALIGN(4);
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__data_start = .;
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*(.data.tasks)
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*(.data)
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#ifdef CONFIG_MPU
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/* It has to be aligned by 32 bytes to be a valid MPU region. */
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. = ALIGN(32);
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__iram_text_start = .;
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#else
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. = ALIGN(4);
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#endif
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*(.iram.text)
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#ifdef CONFIG_MPU
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. = ALIGN(32);
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__iram_text_end = .;
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#else
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. = ALIGN(4);
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#endif
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__data_end = .;
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/* Shared memory buffer must be at the end of preallocated RAM, so it
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* can expand to use all the remaining RAM. */
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__shared_mem_buf = .;
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/* Tag at end of firmware image so that we can find the image size.
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* This may be overwritten by the shared memory buffer; that's ok
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* because we only use it to find the image size in flash. */
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. = ALIGN(4);
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BYTE(0x45);
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BYTE(0x4e);
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BYTE(0x44);
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BYTE(0xea);
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/* NOTHING MAY GO AFTER THIS! */
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} > IRAM
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#ifdef RSA_PUBLIC_KEY_SIZE
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#ifdef SECTION_IS_RO
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.flash_suffix : {
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FILL(0xff);
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/*
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* Put the public key coefficients at the end of the partition
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* after the pstate bits.
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*/
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. = ORIGIN(PSTATE) + LENGTH(PSTATE) - RSA_PUBLIC_KEY_SIZE;
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*(.rsa_pubkey)
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} > PSTATE
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#else /* RW section: we don't need the RSA public key, put it anywhere */
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.flash_suffix : AT(LOADADDR(.data) + SIZEOF(.data)) {
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*(.rsa_pubkey)
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} > FLASH
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#endif
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#endif
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/* The linker won't notice if the .data section is too big to fit,
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* apparently because we're sending it into IRAM, not FLASH. The following
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* symbol isn't used by the code, but running "objdump -t *.elf | grep hey"
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* will let us check how much flash space we're actually using. The
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* explicit ASSERT afterwards will cause the linker to abort if we use too
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* much. */
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__hey_flash_used = LOADADDR(.data) + SIZEOF(.data) - FW_OFF(SECTION);
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ASSERT(FW_SIZE(SECTION) >=
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(LOADADDR(.data) + SIZEOF(.data) - FW_OFF(SECTION)),
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"No room left in the flash")
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#ifdef CONFIG_USB_RAM_SIZE
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.usb_ram (NOLOAD) : {
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__usb_ram_start = .;
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. = ALIGN(8);
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*(.usb_ram.btable)
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*(.usb_ram.data)
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} > USB_RAM
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#endif
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#if !(defined(SECTION_IS_RO) && defined(CONFIG_FLASH))
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/DISCARD/ : {
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*(.google)
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}
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#endif
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/DISCARD/ : { *(.ARM.*) }
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}
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