mirror of
https://github.com/Telecominfraproject/OpenCellular.git
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f1eddf778a
For most tests, we don't need to power the AP. Let's exclude chipset task to save memory space. BUG=chrome-os-partner:18598 TEST=Run pingpong test on Spring BRANCH=none Change-Id: I545c5b3e1c27b0067d4ffe09a7971d32b75d6039 Signed-off-by: Vic Yang <victoryang@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/47833 Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
134 lines
3.2 KiB
C
134 lines
3.2 KiB
C
/* Copyright (c) 2013 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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/* Spring board configuration */
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#ifndef __BOARD_H
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#define __BOARD_H
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/* 16 MHz SYSCLK clock frequency */
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#define CPU_CLOCK 16000000
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/* Use USART1 as console serial port */
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#define CONFIG_CONSOLE_UART 1
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/* Debug features */
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#define CONFIG_ASSERT_HELP
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#define CONFIG_CONSOLE_CMDHELP
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#define CONFIG_PANIC_HELP
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#undef CONFIG_TASK_PROFILING
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#define CONFIG_WATCHDOG_HELP
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/* Optional features */
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#define CONFIG_ADC
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#define CONFIG_BATTERY_BQ20Z453
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#define CONFIG_BOARD_PRE_INIT
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#ifdef CONFIG_TASK_CHIPSET
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#define CONFIG_CHIPSET_GAIA
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#endif
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#define CONFIG_CMD_PMU
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#define CONFIG_EXTPOWER_USB
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#define CONFIG_HOST_COMMAND_STATUS
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#define CONFIG_I2C
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#define CONFIG_I2C_PASSTHROUGH
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#define CONFIG_KEYBOARD_PROTOCOL_MKBP
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#define CONFIG_LOW_POWER_IDLE /* Use STOP mode when we have nothing to do */
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#define CONFIG_LP5562
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#define CONFIG_PMU_BOARD_INIT
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#define CONFIG_PMU_FORCE_FET /* Always enable 3G modem power rail */
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#define CONFIG_PMU_HARD_RESET
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#define CONFIG_PMU_TPS65090
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#define CONFIG_SMART_BATTERY
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#define CONFIG_TSU6721
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#ifndef __ASSEMBLER__
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/* By default, enable all console messages except keyboard */
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#define CC_DEFAULT (CC_ALL & ~CC_MASK(CC_KEYSCAN))
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/* Keyboard output port list */
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#define KB_OUT_PORT_LIST GPIO_B, GPIO_C
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/* Charging */
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#define I2C_PORT_HOST 0
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#define I2C_PORT_BATTERY I2C_PORT_HOST
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#define I2C_PORT_CHARGER I2C_PORT_HOST
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#define I2C_PORT_SLAVE 1
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/* Low battery threshold. In mAh. */
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#define BATTERY_AP_OFF_LEVEL 1
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/* Timer selection */
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#define TIM_CLOCK_MSB 2
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#define TIM_CLOCK_LSB 4
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/* ADC signal */
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enum adc_channel {
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ADC_CH_USB_VBUS_SNS = 0,
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ADC_CH_USB_DP_SNS,
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ADC_CH_USB_DN_SNS,
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/* Number of ADC channels */
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ADC_CH_COUNT
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};
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/* GPIO signal list */
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enum gpio_signal {
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/* Inputs with interrupt handlers are first for efficiency */
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GPIO_KB_PWR_ON_L = 0, /* Keyboard power button */
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GPIO_PP1800_LDO2, /* LDO2 is ON (end of PMIC sequence) */
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GPIO_SOC1V8_XPSHOLD, /* App Processor ON */
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GPIO_CHARGER_INT,
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GPIO_LID_OPEN, /* LID switch detection */
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GPIO_SUSPEND_L, /* AP suspend/resume state */
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GPIO_WRITE_PROTECTn, /* Write protection pin (low active) */
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/* Keyboard inputs */
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GPIO_KB_IN00,
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GPIO_KB_IN01,
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GPIO_KB_IN02,
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GPIO_KB_IN03,
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GPIO_KB_IN04,
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GPIO_KB_IN05,
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GPIO_KB_IN06,
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GPIO_KB_IN07,
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GPIO_USB_CHG_INT,
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/* Other inputs */
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GPIO_BCHGR_VACG, /* AC good on TPSChrome */
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GPIO_I2C1_SCL,
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GPIO_I2C1_SDA,
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GPIO_I2C2_SCL,
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GPIO_I2C2_SDA,
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/* Outputs */
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GPIO_EN_PP1350, /* DDR 1.35v rail enable */
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GPIO_EN_PP5000, /* 5.0v rail enable */
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GPIO_EN_PP3300, /* 3.3v rail enable */
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GPIO_PMIC_PWRON_L, /* 5v rail ready */
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GPIO_PMIC_RESET, /* Force hard reset of the pmic */
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GPIO_ENTERING_RW, /* EC is R/W mode for the kbc mux */
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GPIO_CHARGER_EN,
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GPIO_EC_INT,
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GPIO_ID_MUX,
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GPIO_KB_OUT00,
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GPIO_KB_OUT01,
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GPIO_KB_OUT02,
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GPIO_KB_OUT03,
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GPIO_KB_OUT04,
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GPIO_KB_OUT05,
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GPIO_KB_OUT06,
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GPIO_KB_OUT07,
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GPIO_KB_OUT08,
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GPIO_KB_OUT09,
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GPIO_KB_OUT10,
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GPIO_KB_OUT11,
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GPIO_KB_OUT12,
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GPIO_BOOST_EN,
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GPIO_ILIM,
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/* Number of GPIOs; not an actual GPIO */
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GPIO_COUNT
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};
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#endif /* !__ASSEMBLER__ */
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#endif /* __BOARD_H */
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