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Slippy uses UART2 instead of UART1 and so the EC needs to be able to tolerate having the host use a different interface. There are of course many ways to accomplish that but this approach adds two config variables to specify the host uart and the host uart irq. The UART port setup is split out to allow them to be configured separately rather than needing to be adjacent in a for loop. The interrupt functions were renamed (to ec and host) in order to indicate which interface they are responsible for. BUG=chrome-os-partner:19356 BRANCH=none TEST=boot slippy and see host serial output Change-Id: I1913ff3d650f329224c9654eee7bb7412fae5402 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/50837
287 lines
6.3 KiB
C
287 lines
6.3 KiB
C
/* Copyright (c) 2012 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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/* UART module for Chrome EC */
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#include "common.h"
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#include "console.h"
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#include "gpio.h"
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#include "lpc.h"
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#include "registers.h"
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#include "task.h"
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#include "uart.h"
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#include "util.h"
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/* Baud rate for UARTs */
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#define BAUD_RATE 115200
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static int init_done;
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int uart_init_done(void)
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{
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return init_done;
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}
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void uart_tx_start(void)
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{
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/*
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* Re-enable the transmit interrupt, then forcibly trigger the
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* interrupt. This works around a hardware problem with the
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* UART where the FIFO only triggers the interrupt when its
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* threshold is _crossed_, not just met.
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*/
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LM4_UART_IM(0) |= 0x20;
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task_trigger_irq(LM4_IRQ_UART0);
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}
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void uart_tx_stop(void)
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{
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LM4_UART_IM(0) &= ~0x20;
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}
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int uart_tx_stopped(void)
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{
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return !(LM4_UART_IM(0) & 0x20);
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}
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void uart_tx_flush(void)
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{
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/* Wait for transmit FIFO empty */
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while (!(LM4_UART_FR(0) & 0x80))
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;
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}
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int uart_tx_ready(void)
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{
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return !(LM4_UART_FR(0) & 0x20);
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}
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int uart_rx_available(void)
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{
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return !(LM4_UART_FR(0) & 0x10);
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}
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void uart_write_char(char c)
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{
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/* Wait for space in transmit FIFO. */
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while (!uart_tx_ready())
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;
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LM4_UART_DR(0) = c;
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}
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int uart_read_char(void)
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{
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return LM4_UART_DR(0);
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}
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static void uart_clear_rx_fifo(int channel)
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{
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int scratch __attribute__ ((unused));
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while (!(LM4_UART_FR(channel) & 0x10))
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scratch = LM4_UART_DR(channel);
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}
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void uart_disable_interrupt(void)
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{
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task_disable_irq(LM4_IRQ_UART0);
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}
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void uart_enable_interrupt(void)
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{
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task_enable_irq(LM4_IRQ_UART0);
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}
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/**
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* Interrupt handler for UART0
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*/
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static void uart_ec_interrupt(void)
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{
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/* Clear transmit and receive interrupt status */
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LM4_UART_ICR(0) = 0x70;
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/* Read input FIFO until empty, then fill output FIFO */
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uart_process();
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}
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DECLARE_IRQ(LM4_IRQ_UART0, uart_ec_interrupt, 1);
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/**
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* Interrupt handler for Host UART
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*/
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static void uart_host_interrupt(void)
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{
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/* Clear transmit and receive interrupt status */
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LM4_UART_ICR(CONFIG_HOST_UART) = 0x70;
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#ifdef CONFIG_LPC
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/*
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* If we have space in our FIFO and a character is pending in LPC,
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* handle that character.
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*/
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if (!(LM4_UART_FR(CONFIG_HOST_UART) & 0x20) && lpc_comx_has_char()) {
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/* Copy the next byte then disable transmit interrupt */
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LM4_UART_DR(CONFIG_HOST_UART) = lpc_comx_get_char();
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LM4_UART_IM(CONFIG_HOST_UART) &= ~0x20;
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}
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/*
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* Handle received character. There is no flow control on input;
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* received characters are blindly forwarded to LPC. This is ok
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* because LPC is much faster than UART, and we don't have flow control
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* on the UART receive-side either.
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*/
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if (!(LM4_UART_FR(CONFIG_HOST_UART) & 0x10))
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lpc_comx_put_char(LM4_UART_DR(CONFIG_HOST_UART));
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#endif
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}
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/* Must be same prio as LPC interrupt handler so they don't preempt */
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DECLARE_IRQ(CONFIG_HOST_UART_IRQ, uart_host_interrupt, 2);
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/**
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* Configure GPIOs for the UART module.
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*/
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static void configure_gpio(void)
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{
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/* UART0 RX and TX are GPIO PA0:1 alternate function 1 */
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gpio_set_alternate_function(LM4_GPIO_A, 0x03, 1);
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#if defined(CONFIG_HOST_UART1_GPIOS_PC4_5)
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/* UART1 RX and TX are GPIO PC4:5 alternate function 2 */
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gpio_set_alternate_function(LM4_GPIO_C, 0x30, 2);
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#elif defined(CONFIG_HOST_UART1_GPIOS_PB0_1)
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/* UART1 RX and TX are GPIO PB0:1 alternate function 1 */
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gpio_set_alternate_function(LM4_GPIO_B, 0x03, 1);
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#elif defined(CONFIG_HOST_UART2_GPIOS_PG4_5)
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/* UART2 RX and TX are GPIO PG4:5 alternate function 1 */
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gpio_set_alternate_function(LM4_GPIO_G, 0x30, 1);
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#else
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#error "Must put Host UART GPIOs somewhere"
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#endif
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}
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static void uart_config(int port)
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{
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/* Disable the port */
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LM4_UART_CTL(port) = 0x0300;
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/* Use the internal oscillator */
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LM4_UART_CC(port) = 0x1;
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/* Set the baud rate divisor */
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LM4_UART_IBRD(port) = (INTERNAL_CLOCK / 16) / BAUD_RATE;
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LM4_UART_FBRD(port) =
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(((INTERNAL_CLOCK / 16) % BAUD_RATE) * 64
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+ BAUD_RATE / 2) / BAUD_RATE;
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/*
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* 8-N-1, FIFO enabled. Must be done after setting
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* the divisor for the new divisor to take effect.
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*/
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LM4_UART_LCRH(port) = 0x70;
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/*
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* Interrupt when RX fifo at minimum (>= 1/8 full), and TX fifo
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* when <= 1/4 full
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*/
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LM4_UART_IFLS(port) = 0x01;
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/*
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* Unmask receive-FIFO, receive-timeout. We need
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* receive-timeout because the minimum RX FIFO depth is 1/8 = 2
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* bytes; without the receive-timeout we'd never be notified
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* about single received characters.
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*/
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LM4_UART_IM(port) = 0x50;
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/* Enable the port */
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LM4_UART_CTL(port) |= 0x0001;
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}
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void uart_init(void)
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{
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volatile uint32_t scratch __attribute__((unused));
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/* Enable UART0 and Host UART and delay a few clocks */
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LM4_SYSTEM_RCGCUART |= (1 << CONFIG_HOST_UART) | 1;
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scratch = LM4_SYSTEM_RCGCUART;
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/* Configure GPIOs */
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configure_gpio();
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/* Configure UARTs (identically) */
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uart_config(0);
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uart_config(CONFIG_HOST_UART);
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/*
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* Enable interrupts for UART0 only. Host UART will have to wait
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* until the LPC bus is initialized.
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*/
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uart_clear_rx_fifo(0);
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task_enable_irq(LM4_IRQ_UART0);
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init_done = 1;
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}
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/*****************************************************************************/
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/* COMx functions */
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void uart_comx_enable(void)
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{
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uart_clear_rx_fifo(CONFIG_HOST_UART);
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task_enable_irq(CONFIG_HOST_UART_IRQ);
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}
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int uart_comx_putc_ok(void)
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{
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if (LM4_UART_FR(CONFIG_HOST_UART) & 0x20) {
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/*
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* FIFO is full, so enable transmit interrupt to let us know
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* when it empties.
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*/
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LM4_UART_IM(CONFIG_HOST_UART) |= 0x20;
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return 0;
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} else {
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return 1;
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}
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}
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void uart_comx_putc(int c)
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{
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LM4_UART_DR(CONFIG_HOST_UART) = c;
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}
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/*****************************************************************************/
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/* Console commands */
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#ifdef CONFIG_CMD_COMXTEST
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/**
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* Write a character to COMx, waiting for space in the output buffer if
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* necessary.
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*/
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static void uart_comx_putc_wait(int c)
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{
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while (!uart_comx_putc_ok())
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;
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uart_comx_putc(c);
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}
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static int command_comxtest(int argc, char **argv)
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{
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/* Put characters to COMX port */
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const char *c = argc > 1 ? argv[1] : "testing comx output!";
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ccprintf("Writing \"%s\\r\\n\" to COMx UART...\n", c);
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while (*c)
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uart_comx_putc_wait(*c++);
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uart_comx_putc_wait('\r');
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uart_comx_putc_wait('\n');
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return EC_SUCCESS;
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}
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DECLARE_CONSOLE_COMMAND(comxtest, command_comxtest,
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"[string]",
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"Write test data to COMx uart",
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NULL);
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#endif /* CONFIG_COMX_TEST */
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