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Changed the low power idle task to use the low speed clock in deep sleep. The low power idle task is currently only enabled for Peppy, Slippy, and Falco. This change decreases power consumption when the AP is not running. Note that the low speed clock is slow enough that the JTAG cannot be used and the EC console UART cannot be used. To work around that, this commit detects when the JTAG is in use and when the EC console is in use, and will not use the low speed clock if either is in use. The JTAG in use never clears after being set and the console in use clears after a fixed timeout period. BUG=None BRANCH=None TEST=Passes all unit tests. Tested that the EC console works when in deep sleep. Tested that it is possible to run flash_ec when in deep sleep and using the low speed clock. Change-Id: Ia65997eb8e607a5df9b2c7d68e4826bfb1e0194c Signed-off-by: Alec Berg <alecaberg@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/173326 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
90 lines
2.7 KiB
C
90 lines
2.7 KiB
C
/* Copyright (c) 2012 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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/* Clocks and power management settings */
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#ifndef __CROS_EC_CLOCK_H
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#define __CROS_EC_CLOCK_H
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#include "common.h"
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/**
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* Set the CPU clocks and PLLs.
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*/
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void clock_init(void);
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/**
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* Return the current clock frequency in Hz.
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*/
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int clock_get_freq(void);
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/**
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* Enable or disable clock for a module.
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*
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* Note that if the module requires a higher system clock speed than the
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* current system clock speed, the entire system clock will be increased
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* to allow the module to operate.
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*
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* When a module is disabled, the system clock will be reduced to the highest
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* clock required by the remaining enabled modules.
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*
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* @param module The module for which we need to enable/disable its
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* clock.
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* @param enable Enable clock if non-zero; disable if zero.
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*/
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void clock_enable_module(enum module_id module, int enable);
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/**
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* Enable or disable the PLL.
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*
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* @param enable Enable PLL if non-zero; disable if zero.
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* @param notify Notify other modules of the PLL change. This should
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* be 1 unless you're briefly turning on the PLL to work
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* around a chip errata at init time.
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*/
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void clock_enable_pll(int enable, int notify);
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/**
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* Wait for a number of clock cycles.
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*
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* Simple busy waiting for use before clocks/timers are initialized.
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*
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* @param cycles Number of cycles to wait.
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*/
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void clock_wait_cycles(uint32_t cycles);
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/* Clock gate control modes for clock_enable_peripheral() */
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#define CGC_MODE_RUN (1 << 0)
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#define CGC_MODE_SLEEP (1 << 1)
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#define CGC_MODE_DSLEEP (1 << 2)
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#define CGC_MODE_ALL (CGC_MODE_RUN | CGC_MODE_SLEEP | CGC_MODE_DSLEEP)
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/**
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* Enable clock to peripheral by setting the CGC register pertaining
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* to run, sleep, and/or deep sleep modes.
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*
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* @param offset Offset of the peripheral. See enum clock_gate_offsets.
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* @param mask Bit mask of the bits within CGC reg to set.
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* @param mode Which mode(s) to enable the clock for
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*/
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void clock_enable_peripheral(uint32_t offset, uint32_t mask, uint32_t mode);
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/**
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* Disable clock to peripheral by setting the CGC register pertaining
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* to run, sleep, and/or deep sleep modes.
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*
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* @param offset Offset of the peripheral. See enum clock_gate_offsets.
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* @param mask Bit mask of the bits within CGC reg to clear.
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* @param mode Which mode(s) to enable the clock for
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*/
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void clock_disable_peripheral(uint32_t offset, uint32_t mask, uint32_t mode);
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/**
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* Notify the clock module that the UART for the console is in use.
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*/
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void clock_refresh_console_in_use(void);
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#endif /* __CROS_EC_CLOCK_H */
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