Matt DeVillier a1df15efc8 soc/intel/broadwell/lpc.c: don't zeroize existing gnvs table ...

The gnvs table only needs to be zeroized after init;
zeroizing an existing/populated table renders all I2C devices
completely non-functional.

TEST: boot Linux and observe all I2C devices functional

Change-Id: Id149ad645dfe5ed999a65d10e786e17585abc477
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/17828
Tested-by: build bot (Jenkins)
Reviewed-by: Nico Huber <nico.h@gmx.de>

2016-12-14 12:10:25 +01:00

..

acpi

src/acpi: Capitalize ACPI and SATA

2016-07-31 19:25:40 +02:00

arch

ACPI S3: Hide acpi_slp_type

2016-12-11 09:00:40 +01:00

commonlib

buildsystem: Drop explicit (k)config.h includes

2016-12-08 19:46:53 +01:00

console

Hook up libhwbase in ramstage

2016-11-29 23:45:40 +01:00

cpu

ACPI S3: Flip ACPI_HUGE_LOWMEM_BACKUP default

2016-12-11 09:12:48 +01:00

device

buildsystem: Drop explicit (k)config.h includes

2016-12-08 19:46:53 +01:00

drivers

pc80: Move set_boot_successful()

2016-12-13 19:15:22 +01:00

ec

buildsystem: Drop explicit (k)config.h includes

2016-12-08 19:46:53 +01:00

include

pc80: Move set_boot_successful()

2016-12-13 19:15:22 +01:00

lib

pc80: Move set_boot_successful()

2016-12-13 19:15:22 +01:00

mainboard

google/eve: Configure I2C3 pins as GPIO inputs

2016-12-14 01:46:05 +01:00

northbridge

nb/intel/gm45: Use lapic udelay in SMM

2016-12-13 17:56:04 +01:00

soc

soc/intel/broadwell/lpc.c: don't zeroize existing gnvs table

2016-12-14 12:10:25 +01:00

southbridge

intel/i945: Use romstage_handoff for S3

2016-12-11 08:58:07 +01:00

superio

sio/ite/it8783ef: Return (0) in ACPI _PSC methods

2016-12-13 22:49:24 +01:00

vboot

commonlib/include: remove NEED_VB20_INTERNALS

2016-11-19 16:57:27 +01:00

vendorcode

vendorcode/google/chromeos: provide acpi phase enforcement pin macros

2016-12-13 19:52:29 +01:00

Kconfig

ACPI S3: Flip ACPI_HUGE_LOWMEM_BACKUP default

2016-12-11 09:12:48 +01:00