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https://github.com/Telecominfraproject/OpenCellular.git
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ae8dd20d77
Also fix a couple places where that makes it fail. BUG=none TEST=none Change-Id: I3b434b4bfa547a579193aac67c1a9d440a2c4e51
89 lines
3.3 KiB
C
89 lines
3.3 KiB
C
/* Copyright (c) 2011 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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/* Flash memory module for Chrome EC */
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#ifndef __CROS_EC_FLASH_H
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#define __CROS_EC_FLASH_H
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#include "common.h"
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#define FLASH_WRITE_BYTES 4
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#define FLASH_FWB_WORDS 32
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#define FLASH_FWB_BYTES (FLASH_FWB_WORDS * 4)
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#define FLASH_ERASE_BYTES 1024
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#define FLASH_PROTECT_BYTES 2048
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/* Initializes the module. */
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int flash_init(void);
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/* Returns the usable size of flash in bytes. Note that this is
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* smaller than the actual flash size, */
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int flash_get_size(void);
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/* Returns the write / erase / protect block size, in bytes.
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* Operations must be aligned to and multiples of the granularity.
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* For example, erase operations must have offset and size which are
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* multiples of the erase block size. */
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int flash_get_write_block_size(void);
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int flash_get_erase_block_size(void);
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int flash_get_protect_block_size(void);
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/* Reads <size> bytes of data from offset <offset> into <data>. */
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int flash_read(int offset, int size, char *data);
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/* Writes <size> bytes of data to flash at byte offset <offset>.
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* <data> must be 32-bit aligned. */
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int flash_write(int offset, int size, const char *data);
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/* Erases <size> bytes of flash at byte offset <offset>. */
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int flash_erase(int offset, int size);
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/* TODO: not super happy about the following APIs yet.
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*
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* The theory of operation is that we'll use the last page of flash to
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* hold the write protect range, and the flag for whether the last
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* page itself should be protected. Then when flash_init() is called,
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* it checks if the write protect pin is asserted, and if so, it
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* writes (but does not commit) the flash protection registers.
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*
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* This simulates what a SPI flash does, where the status register
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* holds the write protect range, and a bit which protects the status
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* register itself. The bit is only obeyed if the write protect pin
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* is enabled.
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*
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* It's an imperfect simulation, because in a SPI flash, as soon as
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* you deassert the pin you can alter the status register, where here
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* it'll take a cold boot to clear protection. Also, here protection
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* gets written to the registers as soon as you set the write protect
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* lock, which is different than SPI, where it's effective as soon as
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* you set the write protect range. */
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/* Gets or sets the write protect range in bytes. This setting is
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* stored in flash, and persists across reboots. If size is non-zero,
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* the write protect range is also locked, and may not be subsequently
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* altered until after a cold boot with the write protect pin
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* deasserted. */
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int flash_get_write_protect_range(uint32_t *offset, uint32_t *size);
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int flash_set_write_protect_range(uint32_t offset, uint32_t size);
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/* The write protect range has been stored into the chip registers
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* this boot. The flash is write protected and the range cannot be
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* changed without rebooting. */
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#define EC_FLASH_WP_RANGE_LOCKED 0x01
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/* The write protect pin was asserted at init time. */
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#define EC_FLASH_WP_PIN_ASSERTED_AT_INIT 0x02
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/* The write protect pin is asserted now. */
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#define EC_FLASH_WP_PIN_ASSERTED_NOW 0x04
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/* Returns the current write protect status; see EC_FLASH_WP_*
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* for valid flags. */
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int flash_get_write_protect_status(void);
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#endif /* __CROS_EC_FLASH_H */
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