Stefan Reinauer af3dce981d Fix gcc 4.6.1 breakage of southbridge/amd/sr5650/pcie.c. ...

Change-Id: I3ccb3860207e1b3ccac4313f7b537c434af5166f
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/360
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
Reviewed-by: Rudolf Marek <r.marek@assembler.cz>

2011-10-30 20:49:15 +01:00

..

arch/x86

Fix coreboot updates

2011-10-29 06:02:04 +02:00

boot

Use ntohll where appropriate.

2011-10-21 14:14:32 +02:00

console

console: support integrated 7-segment displays for POST codes

2011-10-23 17:25:04 +02:00

cpu

Get rid of the old romstage-as-bootblock ROM layout

2011-10-28 22:17:36 +02:00

devices

Use ntohll where appropriate.

2011-10-21 14:14:32 +02:00

drivers

Add driver for ICS954309 clock generator

2011-10-25 19:22:22 +02:00

ec

Lenovo H8: Fix h8_set_audio_mute()

2011-10-25 17:48:41 +02:00

include

Get rid of AUTO_XIP_ROM_BASE

2011-10-28 22:17:10 +02:00

lib

Clear improper use of CONFIG_CACHE_AS_RAM

2011-10-28 22:13:50 +02:00

mainboard

remove usbdebug.h include from mainboard/romstage code

2011-10-30 12:37:05 +01:00

northbridge

Clear improper use of CONFIG_CACHE_AS_RAM

2011-10-28 22:13:50 +02:00

pc80

Fix checksum calculation both in romstage and ramstage.

2011-10-28 09:09:40 +02:00

southbridge

Fix gcc 4.6.1 breakage of southbridge/amd/sr5650/pcie.c.

2011-10-30 20:49:15 +01:00

superio

w83627hf: add method to retrieve wake event source register to ASL include

2011-10-28 22:30:06 +02:00

vendorcode

Fix AMD SB800 (cimx) southbridge code to compile with gcc 4.6

2011-10-14 22:57:11 +02:00

Kconfig

refactor vesa mode setting code and bootsplash code

2011-10-13 20:00:50 +02:00

Kconfig.deprecated_options

some ifdef --> if fixes

2011-04-21 20:24:43 +00:00