Vladimir Serbinenko b1ccccc207 mainboard: New port Packard Bell LM85. ...

Change-Id: I8c1548470c605d06825fe35579879e806bf33542
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/5271
Reviewed-by: Aaron Durbin <adurbin@google.com>
Tested-by: build bot (Jenkins)

2014-04-20 18:47:19 +02:00

..

arch

build rules: Identify build stage with simple variables

2014-04-18 16:40:32 +02:00

console

console: Simplify the enable rules

2014-04-18 16:41:09 +02:00

cpu

console: Use romstage code for ramstage and SMM

2014-04-18 16:39:19 +02:00

device

OxPCIe uart: Split PCI bridge control

2014-04-09 11:29:45 +02:00

drivers

console: Drop driver list in ramstage

2014-04-18 16:39:09 +02:00

ec

ec/compal/ene932: Update to use coreboot EC-mainboard API

2014-04-19 03:49:48 +02:00

include

drivers/elog: Fix implicit function declaration issue

2014-04-20 17:43:34 +02:00

lib

rmodule: add subsections to linker script

2014-04-19 07:11:41 +02:00

mainboard

mainboard: New port Packard Bell LM85.

2014-04-20 18:47:19 +02:00

northbridge

AMD AGESA fam15tn/fam16kb: Remove unused source files

2014-04-16 14:39:11 +02:00

soc

console: Move newline translation outside console_tx_byte

2014-04-09 13:21:25 +02:00

southbridge

southbridge/hudson: Compile refactored SMI setup utilities in SMM

2014-04-18 21:58:39 +02:00

superio

superio/ite/it8728f: Fix headers and prototype location

2014-04-15 04:35:20 +02:00

vendorcode

vendorcode/amd/agesa/fam14: Build as a static library

2014-04-15 17:23:37 +02:00

Kconfig

buildsystem: check for coreboot toolchain by default

2014-04-16 08:20:06 +02:00