scottk/OpenCellular
1
0
Fork 0
mirror of https://github.com/Telecominfraproject/OpenCellular.git synced 2026-01-13 03:15:06 +00:00
Code Issues Packages Projects Releases Wiki Activity
Files
b287e7b3441227e384c7a9fd4e438480a515541b
OpenCellular/board/spring/board.c
Alec Berg 8a9817a5c7 cleanup: Combined i2c unwedge code into one common function 
Refactored the i2c unwedge code to place it in the common directory
so that any EC chip can use it.

Added to the STM32F and LM4 boards, code to automatically detect and
unwedge the i2c bus at the start of an i2c transaction. Note that STM32L
already had this ability.

To enable unwedging of the i2c port though, the gpio pins for SDA and
SCL must be defined in the i2c_ports[] array in the board.c file. This
allows the i2c module to bit bang the unwedging for the given port. If
SDA and SCL are not defined for the port, then the unwedge code will
not run.

BUG=chrome-os-partner:26315, chrome-os-partner:23802
BRANCH=none
TEST=Manual testing on machines with different EC chips.

Testing made extensive use of https://chromium-review.googlesource.com/66389
in order to force wedging of the i2c bus so that we can attempt to unwedge
it. Note that you can easily test if the bus is wedged by running i2cscan.

On pit and spring:
On pit, after each of the following, I verified that the bus was automatically
unwedged.
On spring, the unwedge only runs at reboot, so, for the non-reboot wedge
commands, I manually ran console command unwedge, and verified that the bus
became unwedged.
(1) Bit bang a transaction but only read part of the response.
    Command to wedge: i2cwedge 0x90 0 2 2
(2) Bit bang a transaction to do a "write" and stop while the other side is
    acking. Command to wedge: i2cwedge 0x90 0 1
(3) Same as (1) but do a reboot instead of returning and see
    that the unwedge works at init time w/ no cancelled transactions.
    Command to wedge: i2cwedge 0x90 0 6 2
(4) Same as (2) but do a reboot instead of returning and see
    that the unwedge works at init time w/ no cancelled transactions.
    Command to wedge: i2cwedge 0x90 0 5

On glimmer:
Added code to call i2c_unwedge in accel_init(). Then tested unwedging the
accelerometer with the following. One extra difficulty testing this with
the accelerometer is that sometimes the bit you stop on is high, which
means it won't be wedged at all, the next start transaction will reset
the bus. So, sometimes running i2cwedge won't wedge the bus and sometimes
it will depending on the acceleration data.
(1) Big bang transaction to do a "read" of accelerometer and stop partway:
    i2cwedge 0x1c 0x0f 2 2
    i2cscan to make sure bus is actually wedged
    i2cunwedge
    i2cscan to make sure bus is now unwedged.
(2) Bit bang transaction to do a "read" and stop partway, then reboot:
    i2cwedge 0x1c 0x0f 6 2.
    i2cscan to verify that the bus is working after the reboot.

Change-Id: Ie3328e843ffb40f5001c96626fea131c0f9ad9b1
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/188422
Reviewed-by: Randall Spangler <rspangler@chromium.org>
2014-03-06 02:42:49 +00:00

265 lines
8.8 KiB
C
Raw Blame History

/* Copyright (c) 2013 The Chromium OS Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
/* Spring board-specific configuration */
#include "adc.h"
#include "adc_chip.h"
#include "board_config.h"
#include "chipset.h"
#include "common.h"
#include "console.h"
#include "extpower.h"
#include "gpio.h"
#include "hooks.h"
#include "host_command.h"
#include "i2c.h"
#include "keyboard_raw.h"
#include "lid_switch.h"
#include "pmu_tpschrome.h"
#include "power.h"
#include "pwm.h"
#include "pwm_chip.h"
#include "registers.h"
#include "timer.h"
#include "util.h"
#define GPIO_KB_INPUT (GPIO_INPUT | GPIO_PULL_UP | GPIO_INT_BOTH)
#define GPIO_KB_OUTPUT GPIO_ODR_HIGH
#define INT_BOTH_FLOATING (GPIO_INPUT | GPIO_INT_BOTH)
#define INT_BOTH_PULL_UP (GPIO_INPUT | GPIO_PULL_UP | GPIO_INT_BOTH)
/* GPIO signal list. Must match order from enum gpio_signal. */
const struct gpio_info gpio_list[] = {
/* Inputs with interrupt handlers are first for efficiency */
{"KB_PWR_ON_L", GPIO_B, (1<<5), GPIO_INT_BOTH,
power_signal_interrupt},
{"PP1800_LDO2", GPIO_A, (1<<1), GPIO_INT_BOTH,
power_signal_interrupt},
{"XPSHOLD", GPIO_A, (1<<3), GPIO_INT_BOTH,
power_signal_interrupt},
{"CHARGER_INT_L", GPIO_C, (1<<4), GPIO_INT_FALLING, pmu_irq_handler},
{"LID_OPEN", GPIO_C, (1<<13), GPIO_INT_BOTH, lid_interrupt},
{"SUSPEND_L", GPIO_A, (1<<7), INT_BOTH_FLOATING,
power_signal_interrupt},
{"WP_L", GPIO_A, (1<<13), GPIO_INPUT, NULL},
{"KB_IN00", GPIO_C, (1<<8), GPIO_KB_INPUT,
keyboard_raw_gpio_interrupt},
{"KB_IN01", GPIO_C, (1<<9), GPIO_KB_INPUT,
keyboard_raw_gpio_interrupt},
{"KB_IN02", GPIO_C, (1<<10), GPIO_KB_INPUT,
keyboard_raw_gpio_interrupt},
{"KB_IN03", GPIO_C, (1<<11), GPIO_KB_INPUT,
keyboard_raw_gpio_interrupt},
{"KB_IN04", GPIO_C, (1<<12), GPIO_KB_INPUT,
keyboard_raw_gpio_interrupt},
{"KB_IN05", GPIO_C, (1<<14), GPIO_KB_INPUT,
keyboard_raw_gpio_interrupt},
{"KB_IN06", GPIO_C, (1<<15), GPIO_KB_INPUT,
keyboard_raw_gpio_interrupt},
{"KB_IN07", GPIO_D, (1<<2), GPIO_KB_INPUT,
keyboard_raw_gpio_interrupt},
{"USB_CHG_INT", GPIO_A, (1<<6), GPIO_INT_FALLING, extpower_interrupt},
/* Other inputs */
{"BCHGR_VACG", GPIO_A, (1<<0), GPIO_INT_BOTH, NULL},
/*
* I2C pins should be configured as inputs until I2C module is
* initialized. This will avoid driving the lines unintentionally.
*/
{"I2C1_SCL", GPIO_B, (1<<6), GPIO_INPUT, NULL},
{"I2C1_SDA", GPIO_B, (1<<7), GPIO_INPUT, NULL},
{"I2C2_SCL", GPIO_B, (1<<10), GPIO_INPUT, NULL},
{"I2C2_SDA", GPIO_B, (1<<11), GPIO_INPUT, NULL},
/* Outputs */
{"EN_PP1350", GPIO_A, (1<<14), GPIO_OUT_LOW, NULL},
{"EN_PP5000", GPIO_A, (1<<11), GPIO_OUT_LOW, NULL},
{"EN_PP3300", GPIO_A, (1<<8), GPIO_OUT_LOW, NULL},
{"PMIC_PWRON_L",GPIO_A, (1<<12), GPIO_OUT_HIGH, NULL},
{"PMIC_RESET", GPIO_A, (1<<15), GPIO_OUT_LOW, NULL},
{"ENTERING_RW", GPIO_D, (1<<0), GPIO_OUT_LOW, NULL},
{"CHARGER_EN", GPIO_B, (1<<2), GPIO_OUT_LOW, NULL},
{"EC_INT", GPIO_B, (1<<9), GPIO_ODR_HIGH, NULL},
{"ID_MUX", GPIO_D, (1<<1), GPIO_OUT_LOW, NULL},
{"KB_OUT00", GPIO_B, (1<<0), GPIO_KB_OUTPUT, NULL},
{"KB_OUT01", GPIO_B, (1<<8), GPIO_KB_OUTPUT, NULL},
{"KB_OUT02", GPIO_B, (1<<12), GPIO_KB_OUTPUT, NULL},
{"KB_OUT03", GPIO_B, (1<<13), GPIO_KB_OUTPUT, NULL},
{"KB_OUT04", GPIO_B, (1<<14), GPIO_KB_OUTPUT, NULL},
{"KB_OUT05", GPIO_B, (1<<15), GPIO_KB_OUTPUT, NULL},
{"KB_OUT06", GPIO_C, (1<<0), GPIO_KB_OUTPUT, NULL},
{"KB_OUT07", GPIO_C, (1<<1), GPIO_KB_OUTPUT, NULL},
{"KB_OUT08", GPIO_C, (1<<2), GPIO_KB_OUTPUT, NULL},
{"KB_OUT09", GPIO_B, (1<<1), GPIO_KB_OUTPUT, NULL},
{"KB_OUT10", GPIO_C, (1<<5), GPIO_KB_OUTPUT, NULL},
{"KB_OUT11", GPIO_C, (1<<6), GPIO_KB_OUTPUT, NULL},
{"KB_OUT12", GPIO_C, (1<<7), GPIO_KB_OUTPUT, NULL},
{"BOOST_EN", GPIO_B, (1<<3), GPIO_OUT_HIGH, NULL},
{"ILIM", GPIO_B, (1<<4), GPIO_OUT_LOW, NULL},
};
BUILD_ASSERT(ARRAY_SIZE(gpio_list) == GPIO_COUNT);
/* Pins with alternate functions */
const struct gpio_alt_func gpio_alt_funcs[] = {
/*
* TODO(crosbug.com/p/21618): use this instead of hard-coded register
* writes in board_config_pre_init().
*/
};
const int gpio_alt_funcs_count = ARRAY_SIZE(gpio_alt_funcs);
/* ADC channels */
const struct adc_t adc_channels[] = {
/*
* VBUS voltage sense pin.
* Sense pin 3.3V is converted to 4096. Accounting for the 2x
* voltage divider, the conversion factor is 6600mV/4096.
*/
[ADC_CH_USB_VBUS_SNS] = {"USB_VBUS_SNS", 6600, 4096, 0, STM32_AIN(5)},
/* Micro USB D+ sense pin. Converted to mV (3300mV/4096). */
[ADC_CH_USB_DP_SNS] = {"USB_DP_SNS", 3300, 4096, 0, STM32_AIN(2)},
/* Micro USB D- sense pin. Converted to mV (3300mV/4096). */
[ADC_CH_USB_DN_SNS] = {"USB_DN_SNS", 3300, 4096, 0, STM32_AIN(4)},
};
BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT);
/* PWM channels. Must be in the exactly same order as in enum pwm_channel. */
const struct pwm_t pwm_channels[] = {
{STM32_TIM(3), STM32_TIM_CH(1), 0, GPIO_ILIM},
};
BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT);
/* I2C ports */
const struct i2c_port_t i2c_ports[] = {
{"master", I2C_PORT_MASTER, 100, GPIO_I2C1_SCL, GPIO_I2C1_SDA},
};
const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports);
void board_config_pre_init(void)
{
uint32_t val;
/* Enable all GPIOs clocks */
STM32_RCC_APB2ENR |= 0x1fd;
/* remap OSC_IN/OSC_OUT to PD0/PD1 */
STM32_GPIO_AFIO_MAPR |= 1 << 15;
/*
* use PA13, PA14, PA15, PB3, PB4 as a GPIO,
* so disable JTAG and SWD
*/
STM32_GPIO_AFIO_MAPR = (STM32_GPIO_AFIO_MAPR & ~(0x7 << 24))
| (4 << 24);
/* remap TIM3_CH1 to PB4 */
STM32_GPIO_AFIO_MAPR = (STM32_GPIO_AFIO_MAPR & ~(0x3 << 10))
| (2 << 10);
/* Analog input for ADC pins (PA2, PA4, PA5) */
STM32_GPIO_CRL(GPIO_A) &= ~0x00ff0f00;
/*
* Set alternate function for USART1. For alt. function input
* the port is configured in either floating or pull-up/down
* input mode (ref. section 7.1.4 in datasheet RM0041):
* PA9: Tx, alt. function output
* PA10: Rx, input with pull-down
*
* note: see crosbug.com/p/12223 for more info
*/
val = STM32_GPIO_CRH(GPIO_A) & ~0x00000ff0;
val |= 0x00000890;
STM32_GPIO_CRH(GPIO_A) = val;
/* EC_INT is output, open-drain */
val = STM32_GPIO_CRH(GPIO_B) & ~0xf0;
val |= 0x50;
STM32_GPIO_CRH(GPIO_B) = val;
/* put GPIO in Hi-Z state */
gpio_set_level(GPIO_EC_INT, 1);
}
/* GPIO configuration to be done after I2C module init */
void board_i2c_post_init(int port)
{
uint32_t val;
/* enable alt. function (open-drain) */
if (port == STM32_I2C1_PORT) {
/* I2C1 is on PB6-7 */
val = STM32_GPIO_CRL(GPIO_B) & ~0xff000000;
val |= 0xdd000000;
STM32_GPIO_CRL(GPIO_B) = val;
} else if (port == STM32_I2C2_PORT) {
/* I2C2 is on PB10-11 */
val = STM32_GPIO_CRH(GPIO_B) & ~0x0000ff00;
val |= 0x0000dd00;
STM32_GPIO_CRH(GPIO_B) = val;
}
}
static void board_startup_hook(void)
{
gpio_set_flags(GPIO_SUSPEND_L, INT_BOTH_PULL_UP);
#ifdef CONFIG_PMU_FORCE_FET
/* Enable lcd panel power */
pmu_enable_fet(FET_LCD_PANEL, 1, NULL);
/* Enable backlight power */
pmu_enable_fet(FET_BACKLIGHT, 1, NULL);
#endif /* CONFIG_PMU_FORCE_FET */
}
DECLARE_HOOK(HOOK_CHIPSET_STARTUP, board_startup_hook, HOOK_PRIO_DEFAULT);
static void board_shutdown_hook(void)
{
#ifdef CONFIG_PMU_FORCE_FET
/* Power off backlight power */
pmu_enable_fet(FET_BACKLIGHT, 0, NULL);
/* Power off lcd panel */
pmu_enable_fet(FET_LCD_PANEL, 0, NULL);
#endif /* CONFIG_PMU_FORCE_FET */
/* Disable pull-up on SUSPEND_L during shutdown to prevent leakage */
gpio_set_flags(GPIO_SUSPEND_L, INT_BOTH_FLOATING);
}
DECLARE_HOOK(HOOK_CHIPSET_SHUTDOWN, board_shutdown_hook, HOOK_PRIO_DEFAULT);
int pmu_board_init(void)
{
int failure = 0;
/*
* Adjust charging parameters to match the expectations
* of the hardware fixing the cap ringing on DVT+ machines.
*/
failure |= pmu_set_term_current(RANGE_T01, TERM_I0875);
failure |= pmu_set_term_current(RANGE_T12, TERM_I0875);
failure |= pmu_set_term_current(RANGE_T23, TERM_I0875);
failure |= pmu_set_term_current(RANGE_T34, TERM_I0875);
failure |= pmu_set_term_current(RANGE_T40, TERM_I1000);
failure |= pmu_set_term_voltage(RANGE_T01, TERM_V2100);
failure |= pmu_set_term_voltage(RANGE_T12, TERM_V2100);
failure |= pmu_set_term_voltage(RANGE_T23, TERM_V2100);
failure |= pmu_set_term_voltage(RANGE_T34, TERM_V2100);
failure |= pmu_set_term_voltage(RANGE_T40, TERM_V2100);
/* Set fast charging timeout to 6 hours*/
if (!failure)
failure = pmu_set_fastcharge(TIMEOUT_6HRS);
/* Enable external gpio CHARGER_EN control */
if (!failure)
failure = pmu_enable_ext_control(1);
/* Disable force charging */
if (!failure)
failure = pmu_enable_charger(0);
/* Set NOITERM bit */
if (!failure)
failure = pmu_low_current_charging(1);
return failure ? EC_ERROR_UNKNOWN : EC_SUCCESS;
}
Reference in New Issue View Git Blame Copy Permalink