mirror of
https://github.com/Telecominfraproject/OpenCellular.git
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f9272713da
Added i2ctest console command to test the reliability of the I2C.
By reading/writing to the known registers this tests provides the
number of successful read and writes.
BUG=chrome-os-partner:57487
TEST=Enabled the i2ctest config on Reef and tested the
i2c read/writes.
BRANCH=none
Change-Id: I9e27ff96f2b85422933bc590d112a083990e2dfb
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/290427
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Tested-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
290 lines
8.4 KiB
C
290 lines
8.4 KiB
C
/* Copyright (c) 2013 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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/* I2C interface for Chrome EC */
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#ifndef __CROS_EC_I2C_H
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#define __CROS_EC_I2C_H
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#include "common.h"
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/* Flags for slave address field, in addition to the 8-bit address */
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#define I2C_FLAG_BIG_ENDIAN 0x100 /* 16 byte values are MSB-first */
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/*
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* Supported I2C CLK frequencies.
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* TODO(crbug.com/549286): Use this enum in i2c_port_t.
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*/
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enum i2c_freq {
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I2C_FREQ_1000KHZ = 0,
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I2C_FREQ_400KHZ = 1,
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I2C_FREQ_100KHZ = 2,
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I2C_FREQ_COUNT,
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};
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/* Data structure to define I2C port configuration. */
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struct i2c_port_t {
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const char *name; /* Port name */
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int port; /* Port */
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int kbps; /* Speed in kbps */
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enum gpio_signal scl; /* Port SCL GPIO line */
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enum gpio_signal sda; /* Port SDA GPIO line */
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/* When bus is protected, returns true if passthru allowed for address.
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* If the function is not defined, the default value is true. */
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int (*passthru_allowed)(const struct i2c_port_t *port,
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uint16_t address);
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};
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extern const struct i2c_port_t i2c_ports[];
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extern const unsigned int i2c_ports_used;
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#ifdef CONFIG_CMD_I2C_STRESS_TEST
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struct i2c_test_reg_info {
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int read_reg; /* Read register (WHO_AM_I, DEV_ID, MAN_ID) */
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int read_val; /* Expected val (WHO_AM_I, DEV_ID, MAN_ID) */
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int write_reg; /* Read/Write reg which doesn't impact the system */
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};
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struct i2c_test_results {
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int read_success; /* Successful read count */
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int read_fail; /* Read fail count */
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int write_success; /* Successful write count */
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int write_fail; /* Write fail count */
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};
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/* Data structure to define I2C test configuration. */
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struct i2c_stress_test_dev {
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struct i2c_test_reg_info reg_info;
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struct i2c_test_results test_results;
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int (*i2c_read)(const int port, const int addr,
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const int reg, int *data);
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int (*i2c_write)(const int port, const int addr,
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const int reg, int data);
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int (*i2c_read_dev)(const int reg, int *data);
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int (*i2c_write_dev)(const int reg, int data);
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};
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struct i2c_stress_test {
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int port;
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int addr;
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struct i2c_stress_test_dev *i2c_test;
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};
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extern struct i2c_stress_test i2c_stress_tests[];
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extern const int i2c_test_dev_used;
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#endif
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/* Flags for i2c_xfer() */
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#define I2C_XFER_START (1 << 0) /* Start smbus session from idle state */
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#define I2C_XFER_STOP (1 << 1) /* Terminate smbus session with stop bit */
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#define I2C_XFER_SINGLE (I2C_XFER_START | I2C_XFER_STOP) /* One transaction */
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/**
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* Transmit one block of raw data, then receive one block of raw data.
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*
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* This is a wrapper function for chip_i2c_xfer(), a low-level chip-dependent
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* function. It must be called between i2c_lock(port, 1) and i2c_lock(port, 0).
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*
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* @param port Port to access
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* @param slave_addr Slave device address
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* @param out Data to send
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* @param out_size Number of bytes to send
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* @param in Destination buffer for received data
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* @param in_size Number of bytes to receive
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* @param flags Flags (see I2C_XFER_* above)
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* @return EC_SUCCESS, or non-zero if error.
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*/
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int i2c_xfer(int port, int slave_addr, const uint8_t *out, int out_size,
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uint8_t *in, int in_size, int flags);
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#define I2C_LINE_SCL_HIGH (1 << 0)
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#define I2C_LINE_SDA_HIGH (1 << 1)
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#define I2C_LINE_IDLE (I2C_LINE_SCL_HIGH | I2C_LINE_SDA_HIGH)
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/**
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* Chip-level function to transmit one block of raw data, then receive one
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* block of raw data.
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*
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* This is a low-level chip-dependent function and should only be called by
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* i2c_xfer().
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*
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* @param port Port to access
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* @param slave_addr Slave device address
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* @param out Data to send
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* @param out_size Number of bytes to send
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* @param in Destination buffer for received data
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* @param in_size Number of bytes to receive
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* @param flags Flags (see I2C_XFER_* above)
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* @return EC_SUCCESS, or non-zero if error.
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*/
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int chip_i2c_xfer(int port, int slave_addr, const uint8_t *out, int out_size,
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uint8_t *in, int in_size, int flags);
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/**
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* Return raw I/O line levels (I2C_LINE_*) for a port when port is in alternate
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* function mode.
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*
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* @param port Port to check
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*/
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int i2c_get_line_levels(int port);
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/**
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* Get GPIO pin for I2C SCL from the i2c port number
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*
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* @param port I2C port number
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* @param sda Pointer to gpio signal to store the SCL gpio at
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* @return EC_SUCCESS if a valid GPIO point is found, EC_ERROR_INVAL if not
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*/
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int get_scl_from_i2c_port(int port, enum gpio_signal *scl);
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/**
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* Get GPIO pin for I2C SDA from the i2c port number
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*
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* @param port I2C port number
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* @param sda Pointer to gpio signal to store the SDA gpio at
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* @return EC_SUCCESS if a valid GPIO point is found, EC_ERROR_INVAL if not
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*/
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int get_sda_from_i2c_port(int port, enum gpio_signal *sda);
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/**
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* Get the state of the SCL pin when port is not in alternate function mode.
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*
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* @param port I2C port of interest
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* @return State of SCL pin
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*/
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int i2c_raw_get_scl(int port);
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/**
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* Get the state of the SDA pin when port is not in alternate function mode.
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*
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* @param port I2C port of interest
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* @return State of SDA pin
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*/
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int i2c_raw_get_sda(int port);
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/**
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* Set the state of the SCL pin.
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*
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* @param port I2C port of interest
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* @param level State to set SCL pin to
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*/
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void i2c_raw_set_scl(int port, int level);
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/**
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* Set the state of the SDA pin.
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*
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* @param port I2C port of interest
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* @param level State to set SDA pin to
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*/
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void i2c_raw_set_sda(int port, int level);
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/**
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* Toggle the I2C pins into or out of raw / big-bang mode.
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*
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* @param port I2C port of interest
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* @param enable Flag to enable raw mode or disable it
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* @return EC_SUCCESS if successful
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*/
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int i2c_raw_mode(int port, int enable);
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/**
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* Lock / unlock an I2C port.
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* @param port Port to lock
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* @param lock 1 to lock, 0 to unlock
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*/
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void i2c_lock(int port, int lock);
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/* Default maximum time we allow for an I2C transfer */
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#define I2C_TIMEOUT_DEFAULT_US (100 * MSEC)
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/**
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* Prepare I2C module for sysjump.
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*/
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void i2c_prepare_sysjump(void);
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/**
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* Set the timeout for an I2C transaction.
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*
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* @param port Port to set timeout for
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* @param timeout Timeout in usec, or 0 to use default
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*/
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void i2c_set_timeout(int port, uint32_t timeout);
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/**
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* Read a 32-bit register from the slave at 8-bit slave address <slaveaddr>, at
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* the specified 8-bit <offset> in the slave's address space.
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*/
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int i2c_read32(int port, int slave_addr, int offset, int *data);
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/**
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* Write a 32-bit register to the slave at 8-bit slave address <slaveaddr>, at
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* the specified 8-bit <offset> in the slave's address space.
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*/
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int i2c_write32(int port, int slave_addr, int offset, int data);
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/**
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* Read a 16-bit register from the slave at 8-bit slave address <slaveaddr>, at
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* the specified 8-bit <offset> in the slave's address space.
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*/
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int i2c_read16(int port, int slave_addr, int offset, int *data);
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/**
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* Write a 16-bit register to the slave at 8-bit slave address <slaveaddr>, at
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* the specified 8-bit <offset> in the slave's address space.
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*/
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int i2c_write16(int port, int slave_addr, int offset, int data);
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/**
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* Read an 8-bit register from the slave at 8-bit slave address <slaveaddr>, at
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* the specified 8-bit <offset> in the slave's address space.
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*/
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int i2c_read8(int port, int slave_addr, int offset, int *data);
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/**
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* Write an 8-bit register to the slave at 8-bit slave address <slaveaddr>, at
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* the specified 8-bit <offset> in the slave's address space.
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*/
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int i2c_write8(int port, int slave_addr, int offset, int data);
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/**
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* @return non-zero if i2c bus is busy
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*/
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int i2c_is_busy(int port);
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/**
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* Attempt to unwedge an I2C bus.
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*
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* @param port I2C port
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*
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* @return EC_SUCCESS or EC_ERROR_UNKNOWN
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*/
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int i2c_unwedge(int port);
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/**
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* Read ascii string using smbus read block protocol.
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* Read bytestream from <slaveaddr>:<offset> with format:
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* [length_N] [byte_0] [byte_1] ... [byte_N-1]
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*
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* <len> : the max length of receving buffer. to read N bytes
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* ascii, len should be at least N+1 to include the
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* terminating 0.
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* <len> == 0 : buffer size > 255
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*/
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int i2c_read_string(int port, int slave_addr, int offset, uint8_t *data,
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int len);
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/**
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* Convert port number to controller number, for multi-port controllers.
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* This function will only be called if CONFIG_I2C_MULTI_PORT_CONTROLLER is
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* defined.
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*
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* @parm port I2C port
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*
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* @return controller number, or -1 on invalid parameter
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*/
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int i2c_port_to_controller(int port);
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#endif /* __CROS_EC_I2C_H */
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