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bad6201834
Currently, the STM32L I2C driver queues the stop condition, but
doesn't actually wait for it to take effect before returning. If
another back-to-back transfer is started, this may attempt to send a
start condition before the stop condition completes. If this happens
after a slave read, this can look to the slave like just another pulse
on SCL, causing it to clock out another bit - potentially driving SDA
low and hanging the bus.
Instead, wait for the bus to go idle, then wait another clock period
(10 us) to give the slaves plenty of time to detect bus-idle before
the next start condition.
BUG=chrome-os-partner:22093
BRANCH=pit
TEST=repeatedly run the battery i2c command from the EC console while
running 'ectool i2cxfer 0 0x48 1' from a root shell. Should not hang
the I2C bus.
Change-Id: I5e65ee242537dbc801fba4ae57847a5af5104186
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/66997
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Commit-Queue: Douglas Anderson <dianders@chromium.org>