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15135076e2
This patch adds a module which runs on top of the SPS driver and
implements the TCG SPI TPM protocol.
Basic register read and write functions are implemented as well as
rudimentary TPM state machine (claiming/releasing locality).
An enhancement is made to the SPS driver to ensure that when the CS is
deasserted the transmit FIFO is reset too, on the off chance of the CS
going away mid transaction for whatever reason.
In this implementation the slave is guaranteed to stall the master for
a few bytes in both receive and transmit transactions, which is
further aggravated by the fact that RX FIFO threshold is set to 8
(this is the minimum number of bytes the master has to send to wake up
the slave). This could be fine tuned later, for instance made a
parameter of the receive callback registration function.
BRANCH=none
BUG=chrome-os-partner:43025
TEST=trunksd initialization (with minor changes to accommodate new
VID/DID and some status bits, to be published) succeeds with the
cr50 connected to the USB/SPI cable.
Change-Id: I28d37c3b57dde9adf59e81426efe4f58880cf0b0
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/285252
93 lines
2.1 KiB
C
93 lines
2.1 KiB
C
/* Copyright (c) 2014 The Chromium OS Authors. All rights reserved.
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* Use of this source code is governed by a BSD-style license that can be
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* found in the LICENSE file.
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*/
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#ifndef __CROS_EC_BOARD_H
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#define __CROS_EC_BOARD_H
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/* Features that we don't want just yet */
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#undef CONFIG_CMD_LID_ANGLE
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#undef CONFIG_CMD_POWERINDEBUG
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#undef CONFIG_DMA_DEFAULT_HANDLERS
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#undef CONFIG_FLASH
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#undef CONFIG_FMAP
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#undef CONFIG_HIBERNATE
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#undef CONFIG_LID_SWITCH
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#if !defined(CHIP_VARIANT_CR50_A1)
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/* USB configuration */
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#define CONFIG_USB
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#define CONFIG_USB_HID
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#define CONFIG_USB_BLOB
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#define CONFIG_USB_PID 0x5014
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/* Enable SPI Slave (SPS) module */
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#define CONFIG_SPS
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#define CONFIG_HOSTCMD_SPS
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#define CONFIG_TPM_SPS
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/* We don't need to send events to the AP */
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#undef CONFIG_HOSTCMD_EVENTS
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#endif /* not A1 */
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/*
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* Allow dangerous commands all the time, since we don't have a write protect
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* switch.
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*/
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#define CONFIG_SYSTEM_UNLOCKED
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/* Not using software sync, so verify RW signature instead */
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#define CONFIG_RWSIG
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#define CONFIG_RSA
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#define CONFIG_SHA256
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#define CONFIG_SPS_TEST
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#ifndef __ASSEMBLER__
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#include "gpio_signal.h"
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/* user button interrupt handler */
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void button_event(enum gpio_signal signal);
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/* USB string indexes */
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enum usb_strings {
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USB_STR_DESC = 0,
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USB_STR_VENDOR,
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USB_STR_PRODUCT,
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USB_STR_VERSION,
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USB_STR_CONSOLE_NAME,
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USB_STR_BLOB_NAME,
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USB_STR_HID_NAME,
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USB_STR_COUNT
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};
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#endif /* !__ASSEMBLER__ */
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/* USB interface indexes (use define rather than enum to expand them) */
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#define USB_IFACE_BLOB 0
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#define USB_IFACE_HID 1
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#define USB_IFACE_COUNT 2
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/* USB endpoint indexes (use define rather than enum to expand them) */
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#define USB_EP_CONTROL 0
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#define USB_EP_BLOB 1
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#define USB_EP_HID 2
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#define USB_EP_COUNT 3
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/*
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* This would be a low hanging fruit if there is a need to reduce memory
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* footprint. Having a large buffer helps not to drop debug outputs generated
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* before console is initialized, but this is not really necessary in a
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* production device.
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*/
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#undef CONFIG_UART_TX_BUF_SIZE
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#define CONFIG_UART_TX_BUF_SIZE 4096
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#endif /* __CROS_EC_BOARD_H */
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